Characterizing interface trap states in commercial wide bandgap devices using frequency-based measurements requires unconventionally high probing frequencies to account for both fast and slow traps associated with wide bandgap materials. The C − ψ S technique has been suggested as a viable quasi-static method for determining the interface trap state densities in wide bandgap systems, but the results are shown to be susceptible to errors in the analysis procedure. This work explores the primary sources of errors present in the C − ψ S technique using an analytical model that describes the apparent response for wide bandgap MOS capacitor devices. Measurement noise is shown to greatly impact the linear fitting routine of the 1 / C S ∗ 2 vs ψ S plot to calibrate the additive constant in the surface potential/gate voltage relationship, and an inexact knowledge of the oxide capacitance is also shown to impede interface trap state analysis near the band edge. In addition, a slight nonlinearity that is typically present throughout the 1 / C S ∗ 2 vs ψ S plot hinders the accurate estimation of interface trap densities, which is demonstrated for a fabricated n-SiC MOS capacitor device. Methods are suggested to improve quasi-static analysis, including a novel method to determine an approximate integration constant without relying on a linear fitting routine.
This paper describes a process for forming a buried field shield in GaN by an etch-and-regrowth process, which is intended to protect the gate dielectric from high fields in the blocking state. GaN trench MOSFETs made at Sandia serve as the baseline to show the limitations in making a trench gated device without a method to protect the gate dielectric. Device data coupled with simulations show device failure at 30% of theoretical breakdown for devices made without a field shield. Implementation of a field shield reduces the simulated electric field in the dielectric to below 4 MV/cm at breakdown, which eliminates the requirement to derate the device in order to protect the dielectric. For realistic lithography tolerances, however, a shield-to-channel distance of 0.4 μm limits the field in the gate dielectric to 5 MV/cm and requires a small margin of device derating to safeguard a long-term reliability and lifetime of the dielectric.
Here we report on AlGaN high electron mobility transistor (HEMT)-based logic development, using combined enhancement- and depletion-mode transistors to fabricate inverters with operation from room temperature up to 500°C. Our development approach included: (a) characterizing temperature-dependent carrier transport for different AlGaN HEMT heterostructures, (b) developing a suitable gate metal scheme for use in high temperatures, and (c) over-temperature testing of discrete devices and inverters. Hall mobility data (from 30°C to 500°C) revealed the reference GaN-channel HEMT experienced a 6.9x reduction in mobility, whereas the AlGaN channel HEMTs experienced about a 3.1x reduction. Furthermore, a greater aluminum contrast between the barrier and channel enabled higher carrier densities in the two-dimensional electron gas for all temperatures. The combination of reduced variation in mobility with temperature and high sheet carrier concentration showed that an Al-rich AlGaN-channel HEMT with a high barrier-to-channel aluminum contrast is the best option for an extreme temperature HEMT design. Three gate metal stacks were selected for low resistivity, high melting point, low thermal expansion coefficient, and high expected barrier height. The impact of thermal cycling was examined through electrical characterization of samples measured before and after rapid thermal anneal. The 200-nm tungsten gate metallization was the top performer with minimal reduction in drain current, a slightly positive threshold voltage shift, and about an order of magnitude advantage over the other gates in on-to-off current ratio. After incorporating the tungsten gate metal stack in device fabrication, characterization of transistors and inverters from room temperature up to 500°C was performed. The enhancement-mode (e-mode) devices’ resistance started increasing at about 200°C, resulting in drain current degradation. This phenomenon was not observed in depletion-mode (d-mode) devices but highlights a challenge for inverters in an e-mode driver and d-mode load configuration.
Structural modularity is critical to solid-state transformer (SST) and solid-state power substation (SSPS) concepts, but operational aspects related to this modularity are not yet fully understood. Previous studies and demonstrations of modular power conversion systems assume identical module compositions, but dependence on module uniformity undercuts the value of the modular framework. In this project, a hierarchical control approach was developed for modular SSTs which achieves system-level objectives while ensuring equitable power sharing between nonuniform building block modules. This enables module replacements and upgrades which leverage circuit and device technology advancements to improve system-level performance. The functionality of the control approach is demonstrated in detailed time-domain simulations. Results of this project provide context and strategic direction for future LDRD projects focusing on technologies supporting the SST crosscut outcome of the resilient energy systems mission campaign.
We report on AlGaN HEMT-based logic development, using combined enhancement- and depletion-mode transistors to fabricate inverters with operation from room temperature up to 500°C. Our development approach included: (a) characterizing temperature dependent carrier transport for different AlGaN HEMT heterostructures, (b) developing a suitable gate metal scheme for use in high temperatures, and (c) over-temperature testing of discrete devices and inverters. Hall mobility data revealed the GaN-channel HEMT experienced a 6.9× reduction in mobility, whereas the AlGaN channel HEMTs experienced about a 3.1x reduction. Furthermore, a greater aluminum contrast between the barrier and channel enabled higher carrier densities in the two-dimensional electron gas for all temperatures. The combination of reduced variation in mobility with temperature and high sheet carrier concentration showed that an Al-rich AlGaN-channel HEMT with a high barrier-to-channel aluminum contrast is the best option for an extreme temperature HEMT design. Three gate metal stacks were selected for low resistivity, high melting point, low thermal expansion coefficient, and high expected barrier height. The impact of thermal cycling was examined through electrical characterization of samples measured before and after rapid thermal anneal. The 200 nm tungsten gate metallization was the top performer with minimal reduction in drain current, a slightly positive threshold voltage shift, and about an order of magnitude advantage over the other gates in on-to-off current ratio. After incorporating the tungsten gate metal stack in device fabrication, characterization of transistors and inverters from room temperature up to 500°C was performed. The enhancement-mode (e-mode) devices’ resistance started increasing at about 200°C, resulting in drain current degradation. This phenomenon was not observed in depletion-mode (d-mode) devices but highlights a challenge for inverters in an e-mode driver and d-mode load configuration.
Vertical gallium nitride (GaN) p-n diodes have garnered significant interest for use in power electronics where high-voltage blocking and high-power efficiency are of concern. In this article, we detail the growth and fabrication methods used to develop a large area (1 mm2) vertical GaN p-n diode capable of a 6.0-kV breakdown. We also demonstrate a large area diode with a forward pulsed current of 3.5 A, an 8.3-mΩ·cm2 differential specific ON-resistance, and a 5.3-kV reverse breakdown. In addition, we report on a smaller area diode (0.063 mm2) that is capable of 6.4-kV breakdown with a differential specific ON-resistance of 10.2 m·Ω·cm2, when accounting for current spreading through the drift region at a 45° angle. Finally, the demonstration of avalanche breakdown is shown for a 0.063-mm2 diode with a room temperature breakdown of 5.6 kV. These results were achieved via epitaxial growth of a 50-μm drift region with a very low carrier concentration of < 1×1015 cm-3 and a carefully designed four-zone junction termination extension.
Impact ionization coefficients play a critical role in semiconductors. In addition to silicon, silicon carbide and gallium nitride are important semiconductors that are being seen more as mainstream semiconductor technologies. As a reflection of the maturity of these semiconductors, predictive modeling has become essential to device and circuit designers, and impact ionization coefficients play a key role here. Recently, several studies have measured impact ionization coefficients. We dedicated the first part of our study to comparing three experimental methods to estimate impact ionization coefficients in GaN, which are all based on photomultiplication but feature characteristic differences. The first method inserts an InGaN hole-injection layer, the accuracy of which is challenged by the dominance of ionization in InGaN, leading to possible overestimation of the coefficients. The second method utilizes the Franz-Keldysh effect for hole injection but not for electrons, where the mixed injection of induced carriers would require a margin of error. The third method uses complementary p-n and n-p structures that have been at the basis of this estimation in Si and SiC and leans on the assumption of a constant electric field, and any deviation would require a margin of error. In the second part of our study, we evaluated the models using recent experimental data from diodes demonstrating avalanche breakdown.
Understanding of semiconductor breakdown under high electric fields is an important aspect of materials’ properties, particularly for the design of power devices. For decades, a power-law has been used to describe the dependence of material-specific critical electrical field (Ecrit) at which the material breaks down and bandgap (Eg). The relationship is often used to gauge tradeoffs of emerging materials whose properties haven’t yet been determined. Unfortunately, the reported dependencies of Ecrit on Eg cover a surprisingly wide range in the literature. Moreover, Ecrit is a function of material doping. Further, discrepancies arise in Ecrit values owing to differences between punch-through and non-punch-through device structures. We report a new normalization procedure that enables comparison of critical electric field values across materials, doping, and different device types. An extensive examination of numerous references reveals that the dependence Ecrit ∝ Eg1.83 best fits the most reliable and newest data for both direct and indirect semiconductors. Graphical abstract: [Figure not available: see fulltext.].
Deep level defects in wide bandgap semiconductors, whose response times are in the range of power converter switching times, can have a significant effect on converter efficiency. We use deep level transient spectroscopy (DLTS) to evaluate such defect levels in the n-drift layer of vertical gallium nitride (v-GaN) power diodes with VBD ∼1500 V. DLTS reveals three energy levels that are at ∼0.6 eV (highest density), ∼0.27 eV (lowest density), and ∼45 meV (a dopant level) from the conduction band. Dopant extraction from capacitance-voltage measurement tests (C-V) at multiple temperatures enables trap density evaluation, and the ∼0.6 eV trap has a density of 1.2 × 1015 cm-3. The 0.6 eV energy level and its density are similar to a defect that is known to cause current collapse in GaN based surface conducting devices (like high electron mobility transistors). Analysis of reverse bias currents over temperature in the v-GaN diodes indicates a predominant role of the same defect in determining reverse leakage current at high temperatures, reducing switching efficiency.
Ultra-Wide-Bandgap semiconductors hold great promise for future power conversion applications. Figures of Merit (FOMs) are often used as a first means to understand the impact of semiconductor material parameters on power semiconductor performance, and in particular the Unipolar (or Baliga) FOM is often cited for this purpose. However, several factors of importance for Ultra-Wide-Bandgap semiconductors are not considered in the standard treatment of this FOM. For example, the Critical Field approximation has many shortcomings, and alternative transport mechanisms and incomplete dopant ionization are typically neglected. This paper presents the results of a study aimed at incorporating some of these effects into more realistic FOM calculations.
This work investigates both avalanche behavior and failure mechanism of 3 kV GaN-on-GaN vertical P-N diodes, that were fabricated and later tested under unclamped inductive switching (UIS) stress. The goal of this study is to use the particular avalanche characteristics and the failure mechanism to identify issues with the field termination and then provide feedback to improve the device design. DC breakdown is measured at the different temperatures to confirm the avalanche breakdown. Diode's avalanche robustness is measured on-wafer using a UIS test set-up which was integrated with a wafer chuck and CCD camera. Post failure analysis of the diode is done using SEM and optical microscopy to gain insight into the device failure physics.
In order to evaluate the time evolution of avalanche breakdown in wide and ultra-wide bandgap devices, we have developed a cable pulser experimental setup that can evaluate the time-evolution of the terminating impedance for a semiconductor device with a time resolution of 130 ps. We have utilized this pulser setup to evaluate the time-to-breakdown of vertical Gallium Nitride and Silicon Carbide diodes for possible use as protection elements in the electrical grid against fast transient voltage pulses (such as those induced by an electromagnetic pulse event). We have found that the Gallium Nitride device demonstrated faster dynamics compared to the Silicon Carbide device, achieving 90% conduction within 1.37 ns compared to the SiC device response time of 2.98 ns. While the Gallium Nitride device did not demonstrate significant dependence of breakdown time with applied voltage, the Silicon Carbide device breakdown time was strongly dependent on applied voltage, ranging from a value of 2.97 ns at 1.33 kV to 0.78 ns at 2.6 kV. The fast response time (< 5 ns) of both the Gallium Nitride and Silicon Carbide devices indicate that both materials systems could meet the stringent response time requirements and may be appropriate for implementation as protection elements against electromagnetic pulse transients.
Wong, Man H.; Bierwagen, Oliver; Kaplar, Robert K.; Umezawa, Hitoshi
Ultrawide-bandgap (UWBG) semiconductor technology is presently going through a renaissance exemplified by advances in material-level understanding, extensions of known concepts to new materials, novel device concepts, and new applications. This focus issue presents a timely selection of papers spanning the current state of the art in UWBG materials and applications, including both experimental results and theoretical developments. It covers broad research subtopics on UWBG bulk crystals and substrate technologies, UWBG defect science and doping, UWBG epitaxy, UWBG electronic and optoelectronic properties, and UWBG power devices and emitters. In this overview article, we consolidate the fundamentals and background of key UWBG semiconductors including aluminum gallium nitride alloys (AlxGa1–xN), boron nitride (BN), diamond, β-phase gallium oxide (β-Ga2O3), and a number of other UWBG binary and ternary oxides. Graphical Abstract: [Figure not available: see fulltext.]
This work provides the first demonstration of vertical GaN Junction Barrier Schottky (JBS) rectifiers fabricated by etch and regrowth of p-GaN. A reverse blocking voltage near 1500 V was achieved at 1 mA reverse leakage, with a sub 1 V turn-on and a specific on-resistance of 10 mΩ-cm2. This result is compared to other reported JBS devices in the literature and our device demonstrates the lowest leakage slope at high reverse bias. A large initial leakage current is present near zero-bias which is attributed to a combination of inadequate etch-damage removal and passivation induced leakage current.
Ultra-wide-bandgap aluminum gallium nitride (AlGaN) possesses several material properties that make it attractive for use in a variety of applications. This chapter focuses on power switching and radio-frequency (RF) devices based on Al-rich AlGaN heterostructures. The relevant figures of merit for both power switching and RF devices are discussed as motivation for the use of AlGaN heterostructures in such applications. The key physical parameters impacting these figures of merit include critical electric field, channel mobility, channel carrier density, and carrier saturation velocity, and the factors influencing these and the trade-offs between them are discussed. Surveys of both power switching and RF devices are given and their performance is described including in special operating regimes such as at high temperatures. Challenges to be overcome, such as the formation of low-resistivity Ohmic contacts, are presented. Finally, an overview of processing-related challenges, especially related to surfaces and interfaces, concludes the chapter.
This study analyzes the ability of various processing techniques to reduce leakage current in vertical GaN MOS devices. Careful analysis is required to determine suitable gate dielectric materials in vertical GaN MOSFET devices since they are largely responsible for determination of threshold voltage, gate leakage reduction, and semiconductor/dielectric interface traps. SiO2, Al2 O3, and HfO2 films were deposited by Atomic Layer Deposition (ALD) and subjected to treatments nominally identical to those in a vertical GaN MOSFET fabrication sequence. This work determines mechanisms for reducing gate leakage by reduction of surface contaminants and interface traps using pre-deposition cleans, elevated temperature depositions, and post-deposition anneals. Breakdown measurements indicate that ALD Al2O3 is an ideal candidate for a MOSFET gate dielectric, with a breakdown electric field near 7.5 MV/cm with no high temperature annealing required to increase breakdown strength. SiO2 ALD films treated with a post deposition anneal at 850 °C for 30 minutes show significant reduction in leakage current while maintaining breakdown at 5.5 MV/cm. HfO2 films show breakdown nominally identical to annealed SiO2 films, but with significantly higher leakage. Additionally, HfO2 films show more sensitivity to high temperature annealing suggesting that more research into surface cleans is necessary to improving these films for MOSFET gate applications.
This work reports an on-wafer study of avalanche behavior and failure analysis of in-house fabricated 1.3 kV GaN-on-GaN P-N diodes. DC breakdown is measured at different temperatures to confirm avalanche behavior. Diode's avalanche ruggedness is measured directly on-wafer using a modified unclamped inductive switching (UIS) test set-up with an integrated thermal chuck and high-speed CCD for real-time imaging during the test. The avalanche ruggedness of the GaN P-N diode is evaluated and compared with a commercial SiC Schottky diode of similar voltage and current rating. Failure analysis is done using SEM and optical microscopy to gain insight into the diode's failure mechanism during avalanche operation.
This paper describes the development of vertical GaN PN diodes for high-voltage applications. A centerpiece of this work is the creation of a foundry effort that incorporates epitaxial growth, wafer metrology, device design, processing, and characterization, and reliability evaluation and failure analysis. A parallel effort aims to develop very high voltage (up to 20 kV) GaN PN diodes for use as devices to protect the electric grid against electromagnetic pulses.
Optimized designs were achieved using a genetic algorithm to evaluate multi-objective trade space, including Mean-Time-Between-Failure (MTBF) and volumetric power density. This work provides a foundational platform that can be used to optimize additional power converters, such as an inverter for the EV traction drive system as well as trade-offs in thermal management due to the use of different device substrate materials.
Ebrish, Mona A.; Anderson, Travis J.; Koehler, Andrew D.; Foster, Geoffrey M.; Gallagher, James C.; Kaplar, Robert K.; Gunning, Brendan P.; Hobart, Karl D.
GaN is a favorable martial for future efficient high voltage power switches. GaN has not dominated the power electronics market due to immature substrate, homoepitaxial growth, and immature processing technology. Understanding the impact of the substrate and homoepitaxial growth on the device performance is crucial for boosting the performance of GaN. In this work, we studied vertical GaN PiN diodes that were fabricated on non-homogenous Hydride Vapor Phase Epitaxy (HVPE) substrates from two different vendors. We show that defects which stemmed from growth techniques manifest themselves as leakage hubs. Different non-homogenous substrates showed different distribution of those defects spatially with the lesser quality substrates clustering those defects in clusters that causes pre-mature breakdown. Energetically these defects are mostly mid-gap around 1.8Ev with light emission spans from 450nm to 700nm. Photon emission spectrometry and hyperspectral electroluminescence were used to locate these defects spatially and energetically.
In power electronic applications, reliability and power density are a few of the many important performance metrics that require continual improvement in order to meet the demand of today's complex electrical systems. However, due to the complexity of the synergy between various components, it is challenging to visualize and evaluate the effects of choosing one component over another and what certain design parameters impose on the overall reliability and lifetime of the system. Furthermore, many areas of electronics have realized remarkable innovation in the integration of new materials of passive and active components; wide-bandgap semiconductor devices and new magnetic materials allow higher operating temperature, blocking voltage, and switching frequency; all of which enable much more compact power converter designs. However, uncertainty remains in the overall electronics reliability in different design variations. Hence, in order to better understand the relationship between reliability and power density in a power electronic system, this paper utilizes a genetic algorithm (GA) to provide pareto optimal solution sets in a multi-variate trade space that relates the Mean Time Between Failures (MTBF) and volumetric power density for the design of a 5 kW synchronous boost converter. Different designs of the synchronous boost converter based on the variation of the electrical parameters and material types for the passive (input and output capacitors, the boost inductor, and the heatsink) and active components (switches) have been studied. A few candidate designs have been evaluated and verified through hardware experiments.
Researchers have been extensively studying wide-bandgap (WBG) semiconductor materials such as gallium nitride (GaN) with an aim to accomplish an improvement in size, weight, and power of power electronics beyond current devices based on silicon (Si). However, the increased operating power densities and reduced areal footprints of WBG device technologies result in significant levels of self-heating that can ultimately restrict device operation through performance degradation, reliability issues, and failure. Typically, self-heating in WBG devices is studied using a single measurement technique while operating the device under steady-state direct current measurement conditions. However, for switching applications, this steady-state thermal characterization may lose significance since the high power dissipation occurs during fast transient switching events. Therefore, it can be useful to probe the WBG devices under transient measurement conditions in order to better understand the thermal dynamics of these systems in practical applications. In this work, the transient thermal dynamics of an AlGaN/GaN high electron mobility transistor (HEMT) were studied using thermoreflectance thermal imaging and Raman thermometry. Also, the proper use of iterative pulsed measurement schemes such as thermoreflectance thermal imaging to determine the steady-state operating temperature of devices is discussed. These studies are followed with subsequent transient thermal characterization to accurately probe the self-heating from steady-state down to submicrosecond pulse conditions using both thermoreflectance thermal imaging and Raman thermometry with temporal resolutions down to 15 ns.
Proper edge termination is required to reach large blocking voltages in vertical power devices. Limitations in selective area p-type doping in GaN restrict the types of structures that can be used for this purpose. A junction termination extension (JTE) can be employed to reduce field crowding at the junction periphery where the charge in the JTE is designed to sink the critical electric field lines at breakdown. One practical way to fabricate this structure in GaN is by a step-etched single-zone or multi-zone JTE where the etch depths and doping levels are used to control the charge in the JTE. The multi-zone JTE is beneficial for increasing the process window and allowing for more variability in parameter changes while still maintaining a designed percentage of the ideal breakdown voltage. Impact ionization parameters reported in literature for GaN are compared in a simulation study to ascertain the dependence on breakdown performance. Two 3-zone JTE designs utilizing different impact ionization coefficients are compared. Simulations confirm that the choice of impact ionization parameters affects both the predicted breakdown of the device as well as the fabrication process variation tolerance for a multi-zone JTE. Regardless of the impact ionization coefficients utilized, a step-etched JTE has the potential to provide an efficient, controllable edge termination design.
High-temperature optical analysis of three different InGaN/GaN multiple quantum well (MQW) light-emitting diode (LED) structures (peak wavelength λp = 448, 467, and 515 nm) is conducted for possible integration as an optocoupler emitter in high-density power electronic modules. The commercially available LEDs, primarily used in the display (λp = 467 and 515 nm) and lighting (λp = 448 nm) applications, are studied and compared to evaluate if they can satisfy the light output requirements in the optocouplers at high temperatures. The temperature- and intensity-dependent electroluminescence (T-IDEL) measurement technique is used to study the internal quantum efficiency (IQE) of the LEDs. All three LEDs exhibit above 70% IQE at 500 K and stable operation at 800 K without flickering or failure. At 800 K, a promising IQE of above 40% is observed for blue for display (BD) (λp = 467 nm) and green for display (GD) (λp = 515 nm) samples. The blue for light (BL) (λp = 448 nm) sample shows 24% IQE at 800 K.
Advances in FinFET design and fabrication enable manufacturing of denser, more compact integrated circuits (ICs) with substantially reduced leakage while shortening the channel-lengths. The same stress-induced leakage and breakdown degradation mechanisms that affect planar transistors also impact FinFET devices. Reliability concerns such as Bias Temperature Instability (BTI), Time Dependent Dielectric Breakdown (TDDB), and Hot Carrier Injection (HCI) become very important with changes to transistor geometry and fin sidewall crystal orientation. Recent testing has shown that FinFETs respond differently to radiation (radiation effects such as total ionizing dose) when compared to planar transistors. These reliability and radiation effects issues become very important when changing transistor geometry and scaling FinFETs towards smaller feature sizes (22-nm, 16-nm, 14- nm, 10-nm, and smaller critical dimensions). The comparable 2019 state of the art transistor densities in current high-volume manufacturing silicon-based foundries is 7-nm (ISMC, Samsung) and 10-nm (Intel) [www.anandtech.com,fuse.wikichip.org]. Released products include supporting components for the cellphone and commercial microprocessor markets respectively. Extensive development in the foundry industry is driving to a 5-nm technology node in late 2020.
High‐temperature optical analysis of three different InGaN/GaN multiple quantum well (MQW) light‐emitting diode (LED) structures (peak wavelength λp = 448, 467, and 515 nm) is conducted for possible integration as an optocoupler emitter in high‐density power electronic modules. The commercially available LEDs, primarily used in the display ( λp = 467 and 515 nm) and lighting ( λp = 448 nm) applications, are studied and compared to evaluate if they can satisfy the light output requirements in the optocouplers at high temperatures. The temperature‐ and intensity‐dependent electroluminescence (T‐IDEL) measurement technique is used to study the internal quantum efficiency (IQE) of the LEDs. All three LEDs exhibit above 70% IQE at 500 K and stable operation at 800 K without flickering or failure. At 800 K, a promising IQE of above 40% is observed for blue for display (BD) ( λp = 467 nm) and green for display (GD) ( λp = 515 nm) samples. The blue for light (BL) ( λp = 448 nm) sample shows 24% IQE at 800 K.
Commercial light emitting diode (LED) materials - blue (i.e., InGaN/GaN multiple quantum wells (MQWs) for display and lighting), green (i.e., InGaN/GaN MQWs for display), and red (i.e., Al0.05Ga0.45In0.5P/Al0.4Ga0.1In0.5P for display) are evaluated in range of temperature (77–800) K for future applications in high density power electronic modules. The spontaneous emission quantum efficiency (QE) of blue, green, and red LED materials with different wavelengths was calculated using photoluminescence (PL) spectroscopy. The spontaneous emission QE was obtained based on a known model so-called the ABC model. This model has been recently used extensively to calculate the internal quantum efficiency and its droop in the III-nitride LED. At 800 K, the spontaneous emission quantum efficiencies are around 40% for blue for lighting and blue for display LED materials, and it is about 44.5% for green for display LED materials. The spontaneous emission QE is approximately 30% for red for display LED material at 800 K. The advance reported in this paper evidences the possibility of improving high temperature optocouplers with an operating temperature of 500 K and above.