Publications

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Abstract: Advantages of the 2.5D HI (Heterogeneous Integration) electronics packaging of the power electronics compared to PCB packaging will be presented. Current 2.5D packaging effort using TSV (Through Silicon Via) will be presented in terms of fabrication, microstructural analysis, reliability, and thermal simulation.

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This project is intended to support the development of new traction drive systems that meet the targets of 100 kW/L for power electronics and 50 kW/L for electric machines with reliable operation to 300,000 miles. To meet these goals, new designs must be identified that make use of state-of-the-art and next-generation electronic materials and design methods. Designs must exploit synergies between components, for example converters designed for high-frequency switching using wide band gap devices and ceramic capacitors. This project includes: (1) a survey of available technologies; (2) the development of design tools that consider the converter volume and performance; (3) exercising the design software to evaluate performance gaps and predict the impact of certain technologies and design approaches, i.e. GaN semiconductors, ceramic capacitors, and select topologies; and (4) building and testing hardware prototypes to validate models and concepts. Early instantiations of the design tools enable co-optimization of the power module and passive elements and provide some design guidance; later instantiations will enable the co-optimization of inverter and machine. Prototype testing begins with evaluation of simpler conversion topologies (i.e. the half-bridge boost converter) and progresses with fabrication of prototype inverter drives.

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DC microgrids envisioned with high bandwidth communications may well expand their application range by considering autonomous strategies as resiliency contingencies. In most cases, these strategies are based on the droop control method, seeking low voltage regulation and proportional load sharing. Control challenges arise when coordinating the output of multiple DC microgrids composed of several Distributed Energy Resources. This paper proposes an autonomous control strategy for transactional converters when multiple DC microgrids are connected through a common bus. The control seeks to match the external bus voltage with the internal bus voltage balancing power. Three case scenarios are considered: standalone operation of each DC microgrid, excess generation, and generation deficit in one DC microgrid. Results using Sandia National Laboratories Secure Scalable Microgrid Simulink library, and models developed in MATLAB are compared.

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With evolving landscape of DC power transmission and distribution, a reliable and fast protection against faults is critical, especially for medium- and high-voltage applications. Thus, solid-state circuit breakers (SSCB), consisting of cascaded silicon carbide (SiC) junction field-effect transistors (JFET), utilize the intrinsic normally-ON characteristic along with their low ON-resistance. This approach provides an efficient and robust protection solution from detrimental short-circuit events. However, for applications that require high-voltage blocking capability, a proper number of JFETs need be connected in series to achieve the desired blocking voltage rating. Ensuring equal voltage balancing across the JFETs during the switching transitions as well as the blocking stage is critical and hence, this paper presents a novel passive balancing network for series connected JFETs for DC SSCB applications. The dynamic voltage balancing network to synchronize both the turn ON and OFF intervals is described analytically. Moreover, the static voltage balancing network is implemented to establish equal sharing of the total blocking voltage across the series connection of JFETs. The proposed dynamic and steady-state balancing networks are validated by SPICE simulation and experimental results.

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In spite of several advantages of SiC JFETs over enhancement mode SiC MOSFETs, the intrinsic normally-ON characteristic of the JFETs can be undesirable for many industrial power conversion applications due to the negative turn-OFF voltage requirement. This prevents normally-ON JFETs from being widely accepted in industry. However, a cascode configuration, which uses a low voltage (LV) Si MOSFET can be used to enable a normally-OFF behavior, making this approach an attractive solution to utilize the benefits of SiC JFETs. For medium-, and high-voltage applications that require larger blocking voltage than the rating of each JFET, additional devices can be connected in series to increase the overall blocking voltage capability, creating a super-cascode configuration. This paper provides a review of several super-cascode topology variations and presents a comprehensive comparative study, evaluating similarities and differences in operating principles, equivalent circuits, and design considerations and limitations.

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