Publications

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Abstract: Advantages of the 2.5D HI (Heterogeneous Integration) electronics packaging of the power electronics compared to PCB packaging will be presented. Current 2.5D packaging effort using TSV (Through Silicon Via) will be presented in terms of fabrication, microstructural analysis, reliability, and thermal simulation.

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This project is intended to support the development of new traction drive systems that meet the targets of 100 kW/L for power electronics and 50 kW/L for electric machines with reliable operation to 300,000 miles. To meet these goals, new designs must be identified that make use of state-of-the-art and next-generation electronic materials and design methods. Designs must exploit synergies between components, for example converters designed for high-frequency switching using wide band gap devices and ceramic capacitors. This project includes: (1) a survey of available technologies; (2) the development of design tools that consider the converter volume and performance; (3) exercising the design software to evaluate performance gaps and predict the impact of certain technologies and design approaches, i.e. GaN semiconductors, ceramic capacitors, and select topologies; and (4) building and testing hardware prototypes to validate models and concepts. Early instantiations of the design tools enable co-optimization of the power module and passive elements and provide some design guidance; later instantiations will enable the co-optimization of inverter and machine. Prototype testing begins with evaluation of simpler conversion topologies (i.e. the half-bridge boost converter) and progresses with fabrication of prototype inverter drives.

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DC microgrids envisioned with high bandwidth communications may well expand their application range by considering autonomous strategies as resiliency contingencies. In most cases, these strategies are based on the droop control method, seeking low voltage regulation and proportional load sharing. Control challenges arise when coordinating the output of multiple DC microgrids composed of several Distributed Energy Resources. This paper proposes an autonomous control strategy for transactional converters when multiple DC microgrids are connected through a common bus. The control seeks to match the external bus voltage with the internal bus voltage balancing power. Three case scenarios are considered: standalone operation of each DC microgrid, excess generation, and generation deficit in one DC microgrid. Results using Sandia National Laboratories Secure Scalable Microgrid Simulink library, and models developed in MATLAB are compared.

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With evolving landscape of DC power transmission and distribution, a reliable and fast protection against faults is critical, especially for medium- and high-voltage applications. Thus, solid-state circuit breakers (SSCB), consisting of cascaded silicon carbide (SiC) junction field-effect transistors (JFET), utilize the intrinsic normally-ON characteristic along with their low ON-resistance. This approach provides an efficient and robust protection solution from detrimental short-circuit events. However, for applications that require high-voltage blocking capability, a proper number of JFETs need be connected in series to achieve the desired blocking voltage rating. Ensuring equal voltage balancing across the JFETs during the switching transitions as well as the blocking stage is critical and hence, this paper presents a novel passive balancing network for series connected JFETs for DC SSCB applications. The dynamic voltage balancing network to synchronize both the turn ON and OFF intervals is described analytically. Moreover, the static voltage balancing network is implemented to establish equal sharing of the total blocking voltage across the series connection of JFETs. The proposed dynamic and steady-state balancing networks are validated by SPICE simulation and experimental results.

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In spite of several advantages of SiC JFETs over enhancement mode SiC MOSFETs, the intrinsic normally-ON characteristic of the JFETs can be undesirable for many industrial power conversion applications due to the negative turn-OFF voltage requirement. This prevents normally-ON JFETs from being widely accepted in industry. However, a cascode configuration, which uses a low voltage (LV) Si MOSFET can be used to enable a normally-OFF behavior, making this approach an attractive solution to utilize the benefits of SiC JFETs. For medium-, and high-voltage applications that require larger blocking voltage than the rating of each JFET, additional devices can be connected in series to increase the overall blocking voltage capability, creating a super-cascode configuration. This paper provides a review of several super-cascode topology variations and presents a comprehensive comparative study, evaluating similarities and differences in operating principles, equivalent circuits, and design considerations and limitations.

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Optimized designs were achieved using a genetic algorithm to evaluate multi-objective trade space, including Mean-Time-Between-Failure (MTBF) and volumetric power density. This work provides a foundational platform that can be used to optimize additional power converters, such as an inverter for the EV traction drive system as well as trade-offs in thermal management due to the use of different device substrate materials.

In power electronic applications, reliability and power density are a few of the many important performance metrics that require continual improvement in order to meet the demand of today's complex electrical systems. However, due to the complexity of the synergy between various components, it is challenging to visualize and evaluate the effects of choosing one component over another and what certain design parameters impose on the overall reliability and lifetime of the system. Furthermore, many areas of electronics have realized remarkable innovation in the integration of new materials of passive and active components; wide-bandgap semiconductor devices and new magnetic materials allow higher operating temperature, blocking voltage, and switching frequency; all of which enable much more compact power converter designs. However, uncertainty remains in the overall electronics reliability in different design variations. Hence, in order to better understand the relationship between reliability and power density in a power electronic system, this paper utilizes a genetic algorithm (GA) to provide pareto optimal solution sets in a multi-variate trade space that relates the Mean Time Between Failures (MTBF) and volumetric power density for the design of a 5 kW synchronous boost converter. Different designs of the synchronous boost converter based on the variation of the electrical parameters and material types for the passive (input and output capacitors, the boost inductor, and the heatsink) and active components (switches) have been studied. A few candidate designs have been evaluated and verified through hardware experiments.

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Power systems with highly flexible architectures (i.e. permitting many configurations) may allow for more economic operation as well as improved reliability and resiliency. The greater number of configurations enable optimization for attaining the former benefit and redundancy for achieving the latter. Flexibility is of great importance in electric ship power systems wherein the system must ensure delivery of power to vital loads. The United States (US) Navy is currently investigating new architectures that enable a greater number of interconnection permutations. Among the new features considered are generators that may supply two buses; this may be done using conventional (single winding set) generators and two rectifiers or a dual wound machine with two rectifiers. In systems supplied by dual-wound machines, buses may not be tied directly but are linked dynamically through the shared generator dynamics. In systems with conventional generation supplying two rectifiers, the two buses are tied through a common AC bus supplying both rectifiers. This paper presents a comparison of these two approaches of supplying two buses from one generator; the evaluation considers issues associated with dynamic coupling through these two candidate architectures, including the coupled response due to faults and systems with pulsed loads. Results are based on analysis, simulation results, and hardware experiment.

This paper describes the design of a very high power density inverter drive module using aggressive high-frequency design methods and multi-objective optimization tools. This work is part of a larger effort to develop electric drive designs with >97% efficiency, power densities of 100 kW/L for the power electronics, and with predicted reliable operation to 300, 000 miles. The approach taken in this work is to develop designs that utilize wide band gap devices (SiC or GaN) and ceramic capacitors to enable high-frequency switching and a compact integrated design. The multi-objective optimization is employed to select key parameters for the design.

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Forced oscillations in power systems are of particular interest when they interact and reinforce inter-area oscillations. This paper determines how a previously proposed inter-area damping controller mitigates forced oscillations. The damping controller modulates active power on the Pacific DC Intertie (PDCI) based on phasor measurement units (PMU) frequency measurements. The primary goal of the controller is to improve the small signal stability of the north south B mode in the North American Western Interconnection (WI). The paper presents small signal stability analysis in a reduced order system, time-domain simulations of a detailed representation of the WI and actual system test results to demonstrate that the PDCI damping controller provides effective damping to forced oscillations in the frequency range below 1 Hz.

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The U.S. Navy is investing in the development of new technologies that broaden warship capabilities and maintain U.S. naval superiority. Specifically, Naval Sea Systems Command (NAVSEA) is supporting the development of power systems technologies that enable the Navy to realise an all-electric warship. A challenge to fielding an all-electric power system architecture includes minimising the size of energy storage systems (ESS) while maintaining the response times necessary to support potential pulsed loads. This work explores the trade-off between energy storage size requirements (i.e. mass) and performance (i.e. peak power, energy storage, and control bandwidth) in the context of a power system architecture that meets the needs of the U.S. Navy. In this work, the simulated time domain responses of a representative power system were evaluated under different loading conditions and control parameters, and the results were considered in conjunction with sizing constraints of and estimated specific power and energy densities of various storage technologies. The simulation scenarios were based on representative operational vignettes, and a Ragone plot was used to illustrate the intersection of potential energy storage sizing with the energy and power density requirements of the system. Furthermore, the energy storage control bandwidth requirements were evaluated by simulation for different loading scenarios. Two approaches were taken to design an ESS: one based only on time domain power and energy requirements from simulation and another based on bandwidth (specific frequency) limitations of various technologies.

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This paper describes the design and implementation of a proof-of-concept Pacific dc Intertie (PDCI) wide area damping controller and includes system test results on the North American Western Interconnection (WI). To damp inter-area oscillations, the controller modulates the power transfer of the PDCI, a ±500 kV dc transmission line in the WI. The control system utilizes real-time phasor measurement unit (PMU) feedback to construct a commanded power signal which is added to the scheduled power flow for the PDCI. After years of design, simulations, and development, this controller has been implemented in hardware and successfully tested in both open and closed-loop operation. The most important design specifications were safe, reliable performance, no degradation of any system modes in any circumstances, and improve damping to the controllable modes in the WI. The main finding is that the controller adds significant damping to the modes of the WI and does not adversely affect the system response in any of the test cases. The primary contribution of this paper, to the state of the art research, is the design methods and test results of the first North American real-time control system that uses wide area PMU feedback.

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