Epitaxial regrowth processes are presented for achieving Al-rich aluminum gallium nitride (AlGaN) high electron mobility transistor (HEMTs) with p-type gates with large, positive threshold voltage for enhancement mode operation and low resistance Ohmic contacts. Utilizing a deep gate recess etch into the channel and an epitaxial regrown p-AlGaN gate structure, an Al0.85Ga0.15N barrier/Al0.50Ga0.50N channel HEMT with a large positive threshold voltage (VTH = +3.5 V) and negligible gate leakage is demonstrated. Epitaxial regrowth of AlGaN avoids the use of gate insulators which can suffer from charge trapping effects observed in typical dielectric layers deposited on AlGaN. Low resistance Ohmic contacts (minimum specific contact resistance = 4 × 10−6 Ω cm2, average = 1.8 × 10−4 Ω cm2) are demonstrated in an Al0.85Ga0.15N barrier/Al0.68Ga0.32N channel HEMT by employing epitaxial regrowth of a heavily doped, n-type, reverse compositionally graded epitaxial structure. The combination of low-leakage, large positive threshold p-gates and low resistance Ohmic contacts by the described regrowth processes provide a pathway to realizing high-current, enhancement-mode, Al-rich AlGaN-based ultra-wide bandgap transistors.
We report a comparative study of three rectifying gate metals, W, Pd, and Pt/Au, on ultrawide bandgap Al0.86Ga0.14N barrier/Al0.7Ga0.3N channel high electron mobility transistors for use in extreme temperatures. The transistors were electrically characterized from 30 to 600 °C in air. Of the three gate metals, the Pt/Au stack exhibited the smallest change in threshold voltage (0.15 V, or 9% change between the 30 and 600 °C values, and a maximum change of 42%), the highest on/off current ratio (1.5 × 106) at 600 °C, and a modest forward gate leakage current (0.39 mA/mm for a 3 V gate bias) at 600 °C. These favorable results showcase AlGaN channel high electron mobility transistors' ability to operate in extreme temperature environments.
This paper describes a process for forming a buried field shield in GaN by an etch-and-regrowth process, which is intended to protect the gate dielectric from high fields in the blocking state. GaN trench MOSFETs made at Sandia serve as the baseline to show the limitations in making a trench gated device without a method to protect the gate dielectric. Device data coupled with simulations show device failure at 30% of theoretical breakdown for devices made without a field shield. Implementation of a field shield reduces the simulated electric field in the dielectric to below 4 MV/cm at breakdown, which eliminates the requirement to derate the device in order to protect the dielectric. For realistic lithography tolerances, however, a shield-to-channel distance of 0.4 μm limits the field in the gate dielectric to 5 MV/cm and requires a small margin of device derating to safeguard a long-term reliability and lifetime of the dielectric.
Here we report on AlGaN high electron mobility transistor (HEMT)-based logic development, using combined enhancement- and depletion-mode transistors to fabricate inverters with operation from room temperature up to 500°C. Our development approach included: (a) characterizing temperature-dependent carrier transport for different AlGaN HEMT heterostructures, (b) developing a suitable gate metal scheme for use in high temperatures, and (c) over-temperature testing of discrete devices and inverters. Hall mobility data (from 30°C to 500°C) revealed the reference GaN-channel HEMT experienced a 6.9x reduction in mobility, whereas the AlGaN channel HEMTs experienced about a 3.1x reduction. Furthermore, a greater aluminum contrast between the barrier and channel enabled higher carrier densities in the two-dimensional electron gas for all temperatures. The combination of reduced variation in mobility with temperature and high sheet carrier concentration showed that an Al-rich AlGaN-channel HEMT with a high barrier-to-channel aluminum contrast is the best option for an extreme temperature HEMT design. Three gate metal stacks were selected for low resistivity, high melting point, low thermal expansion coefficient, and high expected barrier height. The impact of thermal cycling was examined through electrical characterization of samples measured before and after rapid thermal anneal. The 200-nm tungsten gate metallization was the top performer with minimal reduction in drain current, a slightly positive threshold voltage shift, and about an order of magnitude advantage over the other gates in on-to-off current ratio. After incorporating the tungsten gate metal stack in device fabrication, characterization of transistors and inverters from room temperature up to 500°C was performed. The enhancement-mode (e-mode) devices’ resistance started increasing at about 200°C, resulting in drain current degradation. This phenomenon was not observed in depletion-mode (d-mode) devices but highlights a challenge for inverters in an e-mode driver and d-mode load configuration.
We report on AlGaN HEMT-based logic development, using combined enhancement- and depletion-mode transistors to fabricate inverters with operation from room temperature up to 500°C. Our development approach included: (a) characterizing temperature dependent carrier transport for different AlGaN HEMT heterostructures, (b) developing a suitable gate metal scheme for use in high temperatures, and (c) over-temperature testing of discrete devices and inverters. Hall mobility data revealed the GaN-channel HEMT experienced a 6.9× reduction in mobility, whereas the AlGaN channel HEMTs experienced about a 3.1x reduction. Furthermore, a greater aluminum contrast between the barrier and channel enabled higher carrier densities in the two-dimensional electron gas for all temperatures. The combination of reduced variation in mobility with temperature and high sheet carrier concentration showed that an Al-rich AlGaN-channel HEMT with a high barrier-to-channel aluminum contrast is the best option for an extreme temperature HEMT design. Three gate metal stacks were selected for low resistivity, high melting point, low thermal expansion coefficient, and high expected barrier height. The impact of thermal cycling was examined through electrical characterization of samples measured before and after rapid thermal anneal. The 200 nm tungsten gate metallization was the top performer with minimal reduction in drain current, a slightly positive threshold voltage shift, and about an order of magnitude advantage over the other gates in on-to-off current ratio. After incorporating the tungsten gate metal stack in device fabrication, characterization of transistors and inverters from room temperature up to 500°C was performed. The enhancement-mode (e-mode) devices’ resistance started increasing at about 200°C, resulting in drain current degradation. This phenomenon was not observed in depletion-mode (d-mode) devices but highlights a challenge for inverters in an e-mode driver and d-mode load configuration.
Vertical gallium nitride (GaN) p-n diodes have garnered significant interest for use in power electronics where high-voltage blocking and high-power efficiency are of concern. In this article, we detail the growth and fabrication methods used to develop a large area (1 mm2) vertical GaN p-n diode capable of a 6.0-kV breakdown. We also demonstrate a large area diode with a forward pulsed current of 3.5 A, an 8.3-mΩ·cm2 differential specific ON-resistance, and a 5.3-kV reverse breakdown. In addition, we report on a smaller area diode (0.063 mm2) that is capable of 6.4-kV breakdown with a differential specific ON-resistance of 10.2 m·Ω·cm2, when accounting for current spreading through the drift region at a 45° angle. Finally, the demonstration of avalanche breakdown is shown for a 0.063-mm2 diode with a room temperature breakdown of 5.6 kV. These results were achieved via epitaxial growth of a 50-μm drift region with a very low carrier concentration of < 1×1015 cm-3 and a carefully designed four-zone junction termination extension.
In this project we endeavored to improve the state-of-the-art in UV lasers diodes. We made important advancements in several fronts from modeling, to epitaxial growth, to fabrication, and testing. Throughout the project it became clear that polarization doping would be able to help advance the state of laser diode design in terms of electrical performance, but the optical design would need to be investigated to ensure that a 2D guided mode would be supported. New capability in optical modeling using commercial software demonstrated that the new polarization doped structures would be viable. New capability in pulsed testing was established to reach the current and voltage required. Our fabricated devices had some parasitic electrical paths which hindered performance that we were ultimately unable to overcome in the project timeframe. We do believe that future projects will be able to leverage the advancements made under this project.
Potts, Alexander M.; Bajaj, Sanyam; Daughton, David R.; Allerman, A.A.; Armstrong, Andrew A.; Razzak, Towhidur; Sohel, Shahadat H.; Rajan, Siddharth
In this work, ultrawide bandgap Al0.7Ga0.3N MESFETs with refractory Tungsten Schottky and Ohmic contacts are studied in 300–675 K environments. Variable-temperature dc electrical transport reveals large ON-state drain current densities for an AlGaN device: 209 mA/mm at 300 K and 156 mA/mm at 675 K in the ON-state (25% reduction). Drain and gate currents are only weakly temperature-dependent, suggesting potential for engineering temperature invariant operation. The ON-/ OFF-ratio is limited by OFF-state leakage through the gate, which is attributed to damage from sputter deposition. Future work using refractory metals with larger work functions that are deposited by electron beam deposition is proposed.
Understanding the impact of high-energy electron radiation on device characteristics remains critical for the expanding use of semiconductor electronics in space-borne applications and other radiation harsh environments. Here, we report on in situ measurements of high-energy electron radiation effects on the hole diffusion length in low threading dislocation density homoepitaxial bulk n-GaN Schottky diodes using electron beam induced current (EBIC) in high-voltage scanning electron microscopy mode. Despite the large interaction volume in this system, quantitative EBIC imaging is possible due to the sustained collimation of the incident electron beam. This approach enables direct measurement of electron radiation effects without having to thin the specimen. Using a combination of experimental EBIC measurements and Monte Carlo simulations of electron trajectories, we determine a hole diffusion length of 264 ± 11 nm for n-GaN. Irradiation with 200 kV electron beam with an accumulated dose of 24 × 1016 electrons cm−2 led to an approximate 35% decrease in the minority carrier diffusion length.
Advanced GaN power devices are promising for many applications in high power electronics but performance limitations due to material quality in etched-and-regrown junctions prevent their widespread use. Carrier diffusion length is a critical parameter that not only determines device performance but is also a diagnostic of material quality. Here we present the use of electron-beam induced current to measure carrier diffusion lengths in continuously grown and etched-and-regrown GaN pin diodes as models for interfaces in more complex devices. Variations in the quality of the etched-and-regrown junctions are observed and shown to be due to the degradation of the n-type material. We observe an etched-and-regrown junction with properties comparable to a continuously grown junction.
Etched-and-regrown GaN pn-diodes capable of high breakdown voltage (1610 V), low reverse current leakage (1 nA = 6 μ A /cm2 at 1250 V), excellent forward characteristics (ideality factor 1.6), and low specific on-resistance (1.1 m Ω.cm2) were realized by mitigating plasma etch-related defects at the regrown interface. Epitaxial n -GaN layers grown by metal-organic chemical vapor deposition on free-standing GaN substrates were etched using inductively coupled plasma etching (ICP), and we demonstrate that a slow reactive ion etch (RIE) prior to p -GaN regrowth dramatically increases diode electrical performance compared to wet chemical surface treatments. Etched-and-regrown diodes without a junction termination extension (JTE) were characterized to compare diode performance using the post-ICP RIE method with prior studies of other post-ICP treatments. Then, etched-and-regrown diodes using the post-ICP RIE etch steps prior to regrowth were fabricated with a multi-step JTE to demonstrate kV-class operation.
Ultra-wide-bandgap aluminum gallium nitride (AlGaN) possesses several material properties that make it attractive for use in a variety of applications. This chapter focuses on power switching and radio-frequency (RF) devices based on Al-rich AlGaN heterostructures. The relevant figures of merit for both power switching and RF devices are discussed as motivation for the use of AlGaN heterostructures in such applications. The key physical parameters impacting these figures of merit include critical electric field, channel mobility, channel carrier density, and carrier saturation velocity, and the factors influencing these and the trade-offs between them are discussed. Surveys of both power switching and RF devices are given and their performance is described including in special operating regimes such as at high temperatures. Challenges to be overcome, such as the formation of low-resistivity Ohmic contacts, are presented. Finally, an overview of processing-related challenges, especially related to surfaces and interfaces, concludes the chapter.
This work provides the first demonstration of vertical GaN Junction Barrier Schottky (JBS) rectifiers fabricated by etch and regrowth of p-GaN. A reverse blocking voltage near 1500 V was achieved at 1 mA reverse leakage, with a sub 1 V turn-on and a specific on-resistance of 10 mΩ-cm2. This result is compared to other reported JBS devices in the literature and our device demonstrates the lowest leakage slope at high reverse bias. A large initial leakage current is present near zero-bias which is attributed to a combination of inadequate etch-damage removal and passivation induced leakage current.
This study analyzes the ability of various processing techniques to reduce leakage current in vertical GaN MOS devices. Careful analysis is required to determine suitable gate dielectric materials in vertical GaN MOSFET devices since they are largely responsible for determination of threshold voltage, gate leakage reduction, and semiconductor/dielectric interface traps. SiO2, Al2 O3, and HfO2 films were deposited by Atomic Layer Deposition (ALD) and subjected to treatments nominally identical to those in a vertical GaN MOSFET fabrication sequence. This work determines mechanisms for reducing gate leakage by reduction of surface contaminants and interface traps using pre-deposition cleans, elevated temperature depositions, and post-deposition anneals. Breakdown measurements indicate that ALD Al2O3 is an ideal candidate for a MOSFET gate dielectric, with a breakdown electric field near 7.5 MV/cm with no high temperature annealing required to increase breakdown strength. SiO2 ALD films treated with a post deposition anneal at 850 °C for 30 minutes show significant reduction in leakage current while maintaining breakdown at 5.5 MV/cm. HfO2 films show breakdown nominally identical to annealed SiO2 films, but with significantly higher leakage. Additionally, HfO2 films show more sensitivity to high temperature annealing suggesting that more research into surface cleans is necessary to improving these films for MOSFET gate applications.
This paper describes the development of vertical GaN PN diodes for high-voltage applications. A centerpiece of this work is the creation of a foundry effort that incorporates epitaxial growth, wafer metrology, device design, processing, and characterization, and reliability evaluation and failure analysis. A parallel effort aims to develop very high voltage (up to 20 kV) GaN PN diodes for use as devices to protect the electric grid against electromagnetic pulses.
Ammonothermal growth of bulk gallium nitride (GaN) crystals is considered the most suitable method to meet the demand for high quality bulk substrates for power electronics. A non-destructive evaluation of defect content in state-of-the-art ammonothermal substrates has been carried out by synchrotron X-ray topography. Using a monochromatic beam in grazing incidence geometry, high resolution X-ray topographs reveal the various dislocation types present. Ray-tracing simulations that were modified to take both surface relaxation and absorption effects into account allowed improved correlation with observed dislocation contrast so that the Burgers vectors of the dislocations could be determined. The images show the very high quality of the ammonothermal GaN substrate wafers which contain low densities of threading dislocations (TDs) but are free of basal plane dislocations (BPDs). Threading mixed dislocations (TMDs) were found to be dominant among the TDs, and the overall TD density (TDD) of a 1-inch wafer was found to be as low as 5.16 × 103 cm−2.
Steady-state photocapacitance (SSPC) was conducted on nonpolar m-plane GaN n-type Schottky diodes to evaluate the defects induced by inductively coupled plasma (ICP) dry etching in etched-and-regrown unipolar structures. An ∼10× increase in the near-midgap Ec - 1.9 eV level compared to an as-grown material was observed. Defect levels associated with regrowth without an etch were also investigated. The defects in the regrown structure (without an etch) are highly spatially localized to the regrowth interface. Subsequently, by depth profiling an etched-and-regrown sample, we show that the intensities of the defect-related SSPC features associated with dry etching depend strongly on the depth away from the regrowth interface, which is also reported previously [Nedy et al., Semicond. Sci. Technol. 30, 085019 (2015); Fang et al., Jpn. J. Appl. Phys. 42, 4207-4212 (2003); and Cao et al., IEEE Trans. Electron Devices 47, 1320-1324 (2000)]. A photoelectrochemical etching (PEC) method and a wet AZ400K treatment are also introduced to reduce the etch-induced deep levels. A significant reduction in the density of deep levels is observed in the sample that was treated with PEC etching after dry etching and prior to regrowth. An ∼2× reduction in the density of Ec - 1.9 eV level compared to a reference etched-and-regrown structure was observed upon the application of PEC etching treatment prior to the regrowth. The PEC etching method is promising for reducing defects in selective-area doping for vertical power switching structures with complex geometries [Meyers et al., J. Electron. Mater. 49, 3481-3489 (2020)].
Researchers have been extensively studying wide-bandgap (WBG) semiconductor materials such as gallium nitride (GaN) with an aim to accomplish an improvement in size, weight, and power of power electronics beyond current devices based on silicon (Si). However, the increased operating power densities and reduced areal footprints of WBG device technologies result in significant levels of self-heating that can ultimately restrict device operation through performance degradation, reliability issues, and failure. Typically, self-heating in WBG devices is studied using a single measurement technique while operating the device under steady-state direct current measurement conditions. However, for switching applications, this steady-state thermal characterization may lose significance since the high power dissipation occurs during fast transient switching events. Therefore, it can be useful to probe the WBG devices under transient measurement conditions in order to better understand the thermal dynamics of these systems in practical applications. In this work, the transient thermal dynamics of an AlGaN/GaN high electron mobility transistor (HEMT) were studied using thermoreflectance thermal imaging and Raman thermometry. Also, the proper use of iterative pulsed measurement schemes such as thermoreflectance thermal imaging to determine the steady-state operating temperature of devices is discussed. These studies are followed with subsequent transient thermal characterization to accurately probe the self-heating from steady-state down to submicrosecond pulse conditions using both thermoreflectance thermal imaging and Raman thermometry with temporal resolutions down to 15 ns.
Gallium nitride substrates grown by the hydride vapor phase epitaxy (HVPE) method using a patterned growth process have been characterized by synchrotron monochromatic beam X-ray topography in the grazing incidence geometry. Images reveal a starkly heterogeneous distribution of dislocations with areas as large as 0.3 mm2 containing threading dislocation densities below 103 cm−2 in between a grid of strain centers with higher threading dislocation densities (>104 cm−2). Basal plane dislocation densities in these areas are as low as 104 cm−2. By comparing the recorded images of dislocations with ray tracing simulations of expected dislocations in GaN, the Burgers vectors of the dislocations have been determined. The distribution of threading screw/mixed dislocations (TSDs/TMDs), threading edge dislocations (TEDs) and basal plane dislocations (BPDs) is discussed with implications for fabrication of power devices.
AlGaN polarization-doped field-effect transistors were characterized by DC and pulsed measurements from room temperature to 500 °C in ambient. DC current-voltage characteristics demonstrated only a 70% reduction in on-state current from 25 to 500 °C and full gate modulation, regardless of the operating temperature. Near ideal gate lag measurement was realized across the temperature range that is indicative of a high-quality substrate and sufficient surface passivation. The ability for operation at high temperature is enabled by the high Schottky barrier height from the Ni/Au gate contact, with values of 2.05 and 2.76 eV at 25 and 500 °C, respectively. The high barrier height due to the insulatorlike aluminum nitride layer leads to an ION/IOFF ratio of 1.5 × 109 and 6 × 103 at room temperature and 500 °C, respectively. Transmission electron microscopy was used to confirm the stability of the heterostructure even after an extended high-temperature operation with only minor interdiffusion of the Ni/Au Schottky contact. The use of refractory metals in all contacts will be key to ensure a stable extended high-temperature operation.
Research results for AlGaN-channel transistors are reviewed as they have progressed from low Al-content and long-channel devices to Al-rich and short-channel RF devices. Figure of merit (FOM) analysis shows encouraging comparisons relative to today's state-of-the-art GaN devices for high Al-content and elevated temperatures. Critical electric field (EC), which fuels the AlGaN transistor FOM for high Al-composition, is not measured directly, but average gate-drain electric field at breakdown is substantially better in multiple reported AlGaN-channel devices compared to GaN. Challenges for AlGaN include the constraints arising from relatively low room temperature mobility dominated by ternary alloy scattering and the difficulty of making low-resistivity Ohmic contacts to high Al-content materials. Nevertheless, considerable progress has been made recently in the formation of low-resistivity Ohmic contacts to Al-rich AlGaN by using reverse compositional grading in the semiconductor, whereby a contact to a lower-Al alloy (or even to GaN) is made. Specific contact resistivity (ρc) approaching ρc ∼2 × 10-6ωcm2 to AlGaN devices with 70% Al-content in the channel has been reported. Along with scaling of the channel length and tailoring of the threshold voltage, this has enabled a dramatic increase in the current density, which has now reached 0.6 A/mm. Excellent ION/IOFF current ratios have been reported for Schottky-gated structures, in some cases exceeding 109. Encouraging RF performance in Al-rich transistors has been reported as well, with fT and fmax demonstrated in the tens of gigahertz range for devices with less than 150 nm gates. Al-rich transistors have also shown lesser current degradation over temperature than GaN in extreme high-temperature environments up to 500 °C, while maintaining ION/IOFF ratios of ∼106 at 500 °C. Finally, enhancement-mode devices along with initial reliability and radiation results have been reported for Al-rich AlGaN transistors. The Al-rich transistors promise to be a very broad and exciting field with much more progress expected in the coming years as this technology matures.
GaN p-n diodes were formed by selective area regrowth on freestanding GaN substrates using a dry etch, followed by post-etch surface treatment to reduce etch-induced defects, and subsequent regrowth into wells. Etched-and-regrown diodes with a 150 μm diameter achieved 840 V operation at 0.5 A/cm2 reverse current leakage and a specific on-resistance of 1.2 mΩ·cm2. Etched-and-regrown diodes were compared with planar, regrown diodes without etching on the same wafer. Both types of diodes exhibited similar forward and reverse electrical characteristics, which indicate that etch-induced defectivity of the junction was sufficiently mitigated so as not to be the primary cause for leakage. An area dependence for forward and reverse leakage current density was observed, suggesting that the mesa sidewall provided a leakage path.
Impacts of silicon, carbon, and oxygen interfacial impurities on the performance of high-voltage vertical GaN-based p–n diodes are investigated. The results indicate that moderate levels (≈5 × 1017 cm-3) of all interfacial impurities lead to reverse blocking voltages (Vb) greater than 200 V at 1 μA cm-2 and forward leakage of less than 1 µA cm-2 at 1.7 V. At higher interfacial impurity levels, the performance of the diodes becomes compromised. Herein, it is concluded that each impurity has a different effect on the device performance. For example, a high carbon spike at the junction correlates with high off-state leakage current in forward bias (≈100× higher forward leakage current compared with a reference diode), whereas the reverse bias behavior is not severely affected (> 200 V at 1 μA cm-2). High silicon and oxygen spikes at the junction strongly affect the reverse leakage currents (≈ 1–10 V at 1 μA cm-2). Regrown diodes with impurity (silicon, oxygen, and carbon) levels below 5 × 1017 cm-3 show comparable forward and reverse results with the reference continuously grown diodes. The effect of the regrowth interface position relative to the metallurgical junction on the diode performance is also discussed.
The impact of dry-etch-induced defects on the electrical performance of regrown, c-plane, GaN p-n diodes where the p-GaN layer is formed by epitaxial regrowth using metal-organic, chemical-vapor deposition was investigated. Diode leakage increased significantly for etched-and-regrown diodes compared to continuously grown diodes, suggesting a defect-mediated leakage mechanism. Deep level optical spectroscopy (DLOS) techniques were used to identify energy levels and densities of defect states to understand etch-induced damage in regrown devices. DLOS results showed the creation of an emergent, mid-gap defect state at 1.90 eV below the conduction band edge for etched-and-regrown diodes. Reduction in both the reverse leakage and the concentration of the 1.90 eV mid-gap state was achieved using a wet chemical treatment on the etched surface before regrowth, suggesting that the 1.90 eV deep level contributes to increased leakage and premature breakdown but can be mitigated with proper post-etch treatments to achieve >600 V reverse breakdown operation.
Gate length dependent (80 nm–5000 mm) radio frequency measurements to extract saturation velocity are reported for Al0.85Ga0.15N/Al0.7Ga0.3N high electron mobility transistors fabricated into radio frequency devices using electron beam lithography. Direct current characterization revealed the threshold voltage shifting positively with increasing gate length, with devices changing from depletion mode to enhancement mode when the gate length was greater than or equal to 450 nm. Transconductance varied from 10 mS/mm to 25 mS/mm, with the 450 nm device having the highest values. Maximum drain current density was 268 mA/mm at 10 V gate bias. Scattering-parameter characterization revealed a maximum unity gain bandwidth (fT) of 28 GHz, achieved by the 80 nm gate length device. A saturation velocity value of 3.8 × 106 cm/s, or 35% of the maximum saturation velocity reported for GaN, was extracted from the fT measurements.
AlGaN-channel high electron mobility transistors (HEMTs) were operated as visible- and solar-blind photodetectors by using GaN nanodots as an optically active floating gate. The effect of the floating gate was large enough to switch an HEMT from the off-state in the dark to an on-state under illumination. This opto-electronic response achieved responsivity > 108 A/W at room temperature while allowing HEMTs to be electrically biased in the offstate for low dark current and low DC power dissipation. The influence of GaN nanodot distance from the HEMT channel on the dynamic range of the photodetector was investigated, along with the responsivity and temporal response of the floating gate HEMT as a function of optical intensity. The absorption threshold was shown to be controlled by the AlN mole fraction of the HEMT channel layer, thus enabling the same device design to be tuned for either visible- or solar-blind detection.
Enhancement-mode Al0.7Ga0.3N-channel high electron mobility transistors (HEMTs) were achieved through a combination of recessed etching and fluorine ion deposition to shift the threshold voltage (VTH) relative to depletion-mode devices by +5.6 V to VTH = +0.5 V. Accounting for the threshold voltage shift (ΔVTH), current densities of approximately 30 to 35 mA/mm and transconductance values of 13 mS/mm were achieved for both the control and enhancement mode devices at gate biases of 1 V and 6.6 V, respectively. Little hysteresis was observed for all devices, with voltage offsets of 20 mV at drain currents of 1.0 × 10-3mA/mm. Enhancement-mode devices exhibited slightly higher turn-on voltages (+0.38 V) for forward bias gate currents. Piecewise evaluation of a threshold voltage model indicated a ΔVTH of +3.3 V due to a gate recess etching of 12 nm and an additional +2.3 V shift due to fluorine ions near the AlGaN surface.
This work exhibits the ability to shift the threshold voltage of an Al0.45Ga0.55N/Al0.3Ga0.7N high electron mobility transistor through the implementation of a 100 nm thick p-Al0.3Ga0.7N gate. A maximum threshold voltage of +0.3 V was achieved with a 3 μm gate length. In addition to achieving enhancement-mode operation, this work also shows the capability to obtain high saturated drain current (>50 mA/mm), no gate hysteresis, high ION,MAX/IOFF,MIN ratio of >109, and exceptionally low gate leakage current of 10-6 mA/mm even under high forward bias of Vgs = 8 V.