Publications

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Ultra-wide-bandgap aluminum gallium nitride (AlGaN) possesses several material properties that make it attractive for use in a variety of applications. This chapter focuses on power switching and radio-frequency (RF) devices based on Al-rich AlGaN heterostructures. The relevant figures of merit for both power switching and RF devices are discussed as motivation for the use of AlGaN heterostructures in such applications. The key physical parameters impacting these figures of merit include critical electric field, channel mobility, channel carrier density, and carrier saturation velocity, and the factors influencing these and the trade-offs between them are discussed. Surveys of both power switching and RF devices are given and their performance is described including in special operating regimes such as at high temperatures. Challenges to be overcome, such as the formation of low-resistivity Ohmic contacts, are presented. Finally, an overview of processing-related challenges, especially related to surfaces and interfaces, concludes the chapter.

This work reports an on-wafer study of avalanche behavior and failure analysis of in-house fabricated 1.3 kV GaN-on-GaN P-N diodes. DC breakdown is measured at different temperatures to confirm avalanche behavior. Diode's avalanche ruggedness is measured directly on-wafer using a modified unclamped inductive switching (UIS) test set-up with an integrated thermal chuck and high-speed CCD for real-time imaging during the test. The avalanche ruggedness of the GaN P-N diode is evaluated and compared with a commercial SiC Schottky diode of similar voltage and current rating. Failure analysis is done using SEM and optical microscopy to gain insight into the diode's failure mechanism during avalanche operation.

This study analyzes the ability of various processing techniques to reduce leakage current in vertical GaN MOS devices. Careful analysis is required to determine suitable gate dielectric materials in vertical GaN MOSFET devices since they are largely responsible for determination of threshold voltage, gate leakage reduction, and semiconductor/dielectric interface traps. SiO2, Al2 O3, and HfO2 films were deposited by Atomic Layer Deposition (ALD) and subjected to treatments nominally identical to those in a vertical GaN MOSFET fabrication sequence. This work determines mechanisms for reducing gate leakage by reduction of surface contaminants and interface traps using pre-deposition cleans, elevated temperature depositions, and post-deposition anneals. Breakdown measurements indicate that ALD Al2O3 is an ideal candidate for a MOSFET gate dielectric, with a breakdown electric field near 7.5 MV/cm with no high temperature annealing required to increase breakdown strength. SiO2 ALD films treated with a post deposition anneal at 850 °C for 30 minutes show significant reduction in leakage current while maintaining breakdown at 5.5 MV/cm. HfO2 films show breakdown nominally identical to annealed SiO2 films, but with significantly higher leakage. Additionally, HfO2 films show more sensitivity to high temperature annealing suggesting that more research into surface cleans is necessary to improving these films for MOSFET gate applications.

This work provides the first demonstration of vertical GaN Junction Barrier Schottky (JBS) rectifiers fabricated by etch and regrowth of p-GaN. A reverse blocking voltage near 1500 V was achieved at 1 mA reverse leakage, with a sub 1 V turn-on and a specific on-resistance of 10 mΩ-cm2. This result is compared to other reported JBS devices in the literature and our device demonstrates the lowest leakage slope at high reverse bias. A large initial leakage current is present near zero-bias which is attributed to a combination of inadequate etch-damage removal and passivation induced leakage current.

This paper describes the development of vertical GaN PN diodes for high-voltage applications. A centerpiece of this work is the creation of a foundry effort that incorporates epitaxial growth, wafer metrology, device design, processing, and characterization, and reliability evaluation and failure analysis. A parallel effort aims to develop very high voltage (up to 20 kV) GaN PN diodes for use as devices to protect the electric grid against electromagnetic pulses.

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GaN is a favorable martial for future efficient high voltage power switches. GaN has not dominated the power electronics market due to immature substrate, homoepitaxial growth, and immature processing technology. Understanding the impact of the substrate and homoepitaxial growth on the device performance is crucial for boosting the performance of GaN. In this work, we studied vertical GaN PiN diodes that were fabricated on non-homogenous Hydride Vapor Phase Epitaxy (HVPE) substrates from two different vendors. We show that defects which stemmed from growth techniques manifest themselves as leakage hubs. Different non-homogenous substrates showed different distribution of those defects spatially with the lesser quality substrates clustering those defects in clusters that causes pre-mature breakdown. Energetically these defects are mostly mid-gap around 1.8Ev with light emission spans from 450nm to 700nm. Photon emission spectrometry and hyperspectral electroluminescence were used to locate these defects spatially and energetically.

Optimized designs were achieved using a genetic algorithm to evaluate multi-objective trade space, including Mean-Time-Between-Failure (MTBF) and volumetric power density. This work provides a foundational platform that can be used to optimize additional power converters, such as an inverter for the EV traction drive system as well as trade-offs in thermal management due to the use of different device substrate materials.

In power electronic applications, reliability and power density are a few of the many important performance metrics that require continual improvement in order to meet the demand of today's complex electrical systems. However, due to the complexity of the synergy between various components, it is challenging to visualize and evaluate the effects of choosing one component over another and what certain design parameters impose on the overall reliability and lifetime of the system. Furthermore, many areas of electronics have realized remarkable innovation in the integration of new materials of passive and active components; wide-bandgap semiconductor devices and new magnetic materials allow higher operating temperature, blocking voltage, and switching frequency; all of which enable much more compact power converter designs. However, uncertainty remains in the overall electronics reliability in different design variations. Hence, in order to better understand the relationship between reliability and power density in a power electronic system, this paper utilizes a genetic algorithm (GA) to provide pareto optimal solution sets in a multi-variate trade space that relates the Mean Time Between Failures (MTBF) and volumetric power density for the design of a 5 kW synchronous boost converter. Different designs of the synchronous boost converter based on the variation of the electrical parameters and material types for the passive (input and output capacitors, the boost inductor, and the heatsink) and active components (switches) have been studied. A few candidate designs have been evaluated and verified through hardware experiments.