Publications

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We propose a vertical TFET using atomic precision advanced manufacturing (APAM) to create an abrupt buried n++-doped source. We developed a gate stack that preserves the APAM source to accumulate holes above it, with a goal of band-to-band tunneling (BTBT) perpendicular to the gate – critical for the proposed device. A metal-insulator-semiconductor (MIS) capacitor shows hole accumulation above the APAM source, corroborated by simulation, demonstrating the TFET’s feasibility.

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We present a Physics-Informed Graph Neural Network (pigNN) methodology for rapid and automated compact model development. It brings together the inherent strengths of data-driven machine learning, high-fidelity physics in TCAD simulations, and knowledge contained in existing compact models. In this work, we focus on developing a neural network (NN) based compact model for a non-ideal PN diode that represents one nonlinear edge in a pigNN graph. This model accurately captures the smooth transition between the exponential and quasi-linear response regions. By learning voltage dependent non-ideality factor using NN and employing an inverse response function in the NN loss function, the model also accurately captures the voltage dependent recombination effect. This NN compact model serves as basis model for a PN diode that can be a single device or represent an isolated diode in a complex device determined by topological data analysis (TDA) methods. The pigNN methodology is also applicable to derive reduced order models in other engineering areas.

One big challenge of the emerging atomic precision advanced manufacturing (APAM) technology for microelectronics application is to realize APAM devices that operate at room temperature (RT). We demonstrate that semiclassical technology computer aided design (TCAD) device simulation tool can be employed to understand current leakage and improve APAM device design for RT operation. To establish the applicability of semiclassical simulation, we first show that a semiclassical impurity scattering model with the Fermi-Dirac statistics can explain the very low mobility in APAM devices quite well; we also show semiclassical TCAD reproduces measured sheet resistances when proper mobility values are used. We then apply semiclassical TCAD to simulate current leakage in realistic APAM wires. With insights from modeling, we were able to improve device design, fabricate Hall bars, and demonstrate RT operation for the very first time.

We employ a fully charge self-consistent quantum transport formalism, together with a heuristic elastic scattering model, to study the local density of state (LDOS) and the conductive properties of Si:P δ-layer wires at the cryogenic temperature of 4 K. The simulations allow us to explain the origin of shallow conducting sub-bands, recently observed in high resolution angle-resolved photoemission spectroscopy experiments. Our LDOS analysis shows the free electrons are spatially separated in layers with different average kinetic energies, which, along with elastic scattering, must be accounted for to reproduce the sheet resistance values obtained over a wide range of the δ-layer donor densities.

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This manual gives usage information for the Charon semiconductor device simulator. Charon was developed to meet the modeling needs of Sandia National Laboratories and to improve on the capabilities of the commercial TCAD simulators; in particular, the additional capabilities are running very large simulations on parallel computers and modeling displacement damage and other radiation effects in significant detail. The parallel capabilities are based around the MPI interface which allows the code to be ported to a large number of parallel systems, including linux clusters and proprietary "big iron" systems found at the national laboratories and in large industrial settings.

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We present a comprehensive physics investigation of electrothermal effects in III-V heterojunction bipolar transistors (HBTs) via extensive Technology Computer Aided Design (TCAD) simulation and modeling. We show for the first time that the negative differential resistances of the common-emitter output responses in InGaP/GaAs HBTs are caused not only by the well-known carrier mobility reduction, but more importantly also by the increased base-To-emitter hole back injection, as the device temperature increases from self-heating. Both self-heating and impact ionization can cause fly-backs in the output responses under constant base-emitter voltages. We find that the fly-back behavior is due to competing processes of carrier recombination and self-heating or impact ionization induced carrier generation. These findings will allow us to understand and potentially improve the safe operating areas and circuit compact models of InGaP/GaAs HBTs.

We present a comprehensive physics investigation of electrothermal effects in III-V heterojunction bipolar transistors (HBTs) via extensive Technology Computer Aided Design (TCAD) simulation and modeling. We show for the first time that the negative differential resistances of the common-emitter output responses in InGaP/GaAs HBTs are caused not only by the well-known carrier mobility reduction, but more importantly also by the increased base-To-emitter hole back injection, as the device temperature increases from self-heating. Both self-heating and impact ionization can cause fly-backs in the output responses under constant base-emitter voltages. We find that the fly-back behavior is due to competing processes of carrier recombination and self-heating or impact ionization induced carrier generation. These findings will allow us to understand and potentially improve the safe operating areas and circuit compact models of InGaP/GaAs HBTs.