This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: (1) Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. (2) A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to develop new types of analysis without requiring the implementation of analysis-specific device models. (3) Device models that are specifically tailored to meet Sandia’s needs, including some radiation-aware devices (for Sandia users only). (4) Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase — a message passing parallel implementation — which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.
The Xyce™ Parallel Electronic Simulator has been written to support the simulation needs of Sandia National Laboratories’ electrical designers. Xyce™ is a SPICE-compatible simulator with the ability to solve extremely large circuit problems on large-scale parallel computing platforms, but also includes support for most popular parallel and serial computers.
This manual gives usage information for the Charon semiconductor device simulator. Charon was developed to meet the modeling needs of Sandia National Laboratories and to improve on the capabilities of the commercial TCAD simulators; in particular, the additional capabilities are running very large simulations on parallel computers and modeling displacement damage and other radiation effects in significant detail. The parallel capabilities are based around the MPI interface which allows the code to be ported to a large number of parallel systems, including linux clusters and proprietary “big iron” systems found at the national laboratories and in large industrial settings.
This manual gives usage information for the Charon semiconductor device simulator. Charon was developed to meet the modeling needs of Sandia National Laboratories and to improve on the capabilities of the commercial TCAD simulators; in particular, the additional capabilities are running very large simulations on parallel computers and modeling displacement damage and other radiation effects in significant detail. The parallel capabilities are based around the MPI interface which allows the code to be ported to a large number of parallel systems, including linux clusters and proprietary "big iron" systems found at the national laboratories and in large industrial settings.
We present a comprehensive physics investigation of electrothermal effects in III-V heterojunction bipolar transistors (HBTs) via extensive Technology Computer Aided Design (TCAD) simulation and modeling. We show for the first time that the negative differential resistances of the common-emitter output responses in InGaP/GaAs HBTs are caused not only by the well-known carrier mobility reduction, but more importantly also by the increased base-To-emitter hole back injection, as the device temperature increases from self-heating. Both self-heating and impact ionization can cause fly-backs in the output responses under constant base-emitter voltages. We find that the fly-back behavior is due to competing processes of carrier recombination and self-heating or impact ionization induced carrier generation. These findings will allow us to understand and potentially improve the safe operating areas and circuit compact models of InGaP/GaAs HBTs.
We present a comprehensive physics investigation of electrothermal effects in III-V heterojunction bipolar transistors (HBTs) via extensive Technology Computer Aided Design (TCAD) simulation and modeling. We show for the first time that the negative differential resistances of the common-emitter output responses in InGaP/GaAs HBTs are caused not only by the well-known carrier mobility reduction, but more importantly also by the increased base-To-emitter hole back injection, as the device temperature increases from self-heating. Both self-heating and impact ionization can cause fly-backs in the output responses under constant base-emitter voltages. We find that the fly-back behavior is due to competing processes of carrier recombination and self-heating or impact ionization induced carrier generation. These findings will allow us to understand and potentially improve the safe operating areas and circuit compact models of InGaP/GaAs HBTs.
We present an analytic band-to-trap tunneling model developed using the open boundary scattering approach. The new model explicitly includes the effect of heterojunction band offset, in addition to the well known electric field effect. Its analytic form enables straightforward implementation into TCAD device and circuit simulators. The model is capable of simulating both electric field and band offset enhanced carrier recombination due to the band-to-trap tunneling in the depletion region near a heterojunction. Simulation results of an InGaP/GaAs heterojunction bipolar transistor reveal that the proposed model predicts significantly increased base currents, because the hole-to-trap tunneling from the base to the emitter is greatly enhanced by the emitter base heterojunction band offset. The results compare favorably with experimental observations. The developed method can be applied to all one dimensional potentials which can be approximated to a good degree such that the approximated potentials lead to piecewise analytic wave functions with open boundary conditions.
We present an analytic band-to-trap tunneling model developed using the open boundary scattering approach. The new model explicitly includes the effect of heterojunction band offset, in addition to the well known electric field effect. Its analytic form enables straightforward implementation into TCAD device and circuit simulators. The model is capable of simulating both electric field and band offset enhanced carrier recombination due to the band-to-trap tunneling in the depletion region near a heterojunction. Simulation results of an InGaP/GaAs heterojunction bipolar transistor reveal that the proposed model predicts significantly increased base currents, because the hole-to-trap tunneling from the base to the emitter is greatly enhanced by the emitter base heterojunction band offset. The results compare favorably with experimental observations. The developed method can be applied to all one dimensional potentials which can be approximated to a good degree such that the approximated potentials lead to piecewise analytic wave functions with open boundary conditions.