The Zeiss Multi-Beam Scanning Electron Microscope (MultiSEM) was used to image a wide array samples using non-standard operating conditions. The ability of this new, high-throughput imaging technique to produce high-quality images was assessed during this one year LDRD. In addition to exploring new imaging conditions, sample preparation techniques, coupled with theoretical simulations, were explored to optimize the MultiSEM images. To obtain details about the devices imaged, as well as the experimental details, please refer to the classified report from the project manager, Bradley Gabel, or the Cyber IA lead, Justin Ford.
The purpose of this one-year LDRD was to investigate the use of the helium ion microscope (HeIM) for imaging dopant profiles in silicon relevant to integrated circuit technologies. HeIM is a new technology that offers improved spatial resolution over scanning electron microscopy and different beam-solid interaction physics which leads to unique contrast mechanisms. Two parallel thrusts were pursued: 1) traditional imaging via the secondary electron signal and 2) a novel topographical approach. To obtain the experimental details and results, please refer to the classified report from the project manager, Ed Cole, or the Cyber IA lead, Justin Ford.
This report outlines our work on the integration of high efficiency photonic lattice structures with MEMS (MicroElectroMechanical Systems). The simplest of these structures were based on 1-D mirror structures. These were integrated into a variety of devices, movable mirrors, switchable cavities and finally into Bragg fiber structures which enable the control of light in at least 2 dimensions. Of these devices, the most complex were the Bragg fibers. Bragg fibers consist of hollow tubes in which light is guided in a low index media (air) and confined by surrounding Bragg mirror stacks. In this work, structures with internal diameters from 5 to 30 microns have been fabricated and much larger structures should also be possible. We have demonstrated the fabrication of these structures with short wavelength band edges ranging from 400 to 1600nm. There may be potential applications for such structures in the fields of integrated optics and BioMEMS. We have also looked at the possibility of waveguiding in 3 dimensions by integrating defects into 3-dimensional photonic lattice structures. Eventually it may be possible to tune such structures by mechanically modulating the defects.
Two major problems associated with Si-based MEMS (MicroElectroMechanical Systems) devices are stiction and wear. Surface modifications are needed to reduce both adhesion and friction in micromechanical structures to solve these problems. In this paper, we will present a CVD (Chemical Vapor Deposition) process that selectively coats MEMS devices with tungsten and significantly enhances device durability. Tungsten CVD is used in the integrated-circuit industry, which makes this approach manufacturable. This selective deposition process results in a very conformal coating and can potentially address both stiction and wear problems confronting MEMS processing. The selective deposition of tungsten is accomplished through the silicon reduction of WF6. The self-limiting nature of this selective. We deposition process ensures the consistency necessary for process control. The tungsten is deposited after the removal of the sacrificial oxides to minimize stress and process integration problems. Tungsten coating adheres well and is hard and conducting, requirements for device performance. Furthermore, since the deposited tungsten infiltrates under adhered silicon parts and the volume of W deposited is less than the amount of Si consumed, it appears to be possible to release stuck parts that are contacted over small areas such as dimples. The wear resistance of selectively coated W parts has been shown to be significantly improved on microengine test structures.
Low residual stress silicon oxynitride thin films are investigated for use as a replacement for silicon dioxide (SiO2) as sacrificial layer in surface micromachined microelectrical-mechanical systems (MEMS). It is observed that the level of residual stress in oxynitrides is a function of the nitrogen content in the film. MEMS film stacks are prepared using both SiO2 and oxynitride sacrificial layers. Wafer bow measurements indicate that wafers processed with oxynitride release layers are significantly flatter. Polycrystalline Si (poly-Si) cantilevers fabricated under the same conditions are observed to be flatter when processed with oxynitride rather than SiO2 sacrificial layers. These results are attributed to the lower post-processing residual stress of oxynitride compared to SiO2.
This report represents the completion of a three-year Laboratory-Directed Research and Development (LDRD) program to investigate combining microelectromechanical systems (MEMS) with optoelectronic components as a means of realizing compact optomechanical subsystems. Some examples of possible applications are laser beam scanning, switching and routing and active focusing, spectral filtering or shattering of optical sources. The two technologies use dissimilar materials with significant compatibility problems for a common process line. This project emphasized a hybrid approach to integrating optoelectronics and MEMS. Significant progress was made in developing processing capabilities for adding optical function to MEMS components, such as metal mirror coatings and through-vias in the substrate. These processes were used to demonstrate two integration examples, a MEMS discriminator driven by laser illuminated photovoltaic cells and a MEMS shutter or chopper. Another major difficulty with direct integration is providing the optical path for the MEMS components to interact with the light. The authors explored using folded optical paths in a transparent substrate to provide the interconnection route between the components of the system. The components can be surface-mounted by flip-chip bonding to the substrate. Micro-optics can be fabricated into the substrate to reflect and refocus the light so that it can propagate from one device to another and them be directed out of the substrate into free space. The MEMS components do not require the development of transparent optics and can be completely compatible with the current 5-level polysilicon process. They report progress on a MEMS-based laser scanner using these concepts.
Two major problems associated with Si-based MEMS devices are stiction and wear. Surface modifications are needed to reduce both adhesion and friction in micromechanical structures to solve these problems. In this paper, the authors will present a process used to selectively coat MEMS devices with tungsten using a CVD (Chemical Vapor Deposition) process. The selective W deposition process results in a very conformal coating and can potentially solve both stiction and wear problems confronting MEMS processing. The selective deposition of tungsten is accomplished through silicon reduction of WF{sub 6}, which results in a self-limiting reaction. The selective deposition of W only on polysilicon surfaces prevents electrical shorts. Further, the self-limiting nature of this selective W deposition process ensures the consistency necessary for process control. Selective tungsten is deposited after the removal of the sacrificial oxides to minimize process integration problems. This tungsten coating adheres well and is hard and conducting, requirements for device performance. Furthermore, since the deposited tungsten infiltrates under adhered silicon parts and the volume of W deposited is less than the amount of Si consumed, it appears to be possible to release stuck parts that are contacted over small areas such as dimples. Results from tungsten deposition on MEMS structures with dimples will be presented. The effect of wet and vapor phase cleanings prior to the deposition will be discussed along with other process details. The W coating improved wear by orders of magnitude compared to uncoated parts. Tungsten CVD is used in the integrated-circuit industry, which makes this approach manufacturable.
Two major problems associated with Si-based MEMS (MicroElectroMechanical Systems) devices are stiction and wear. Surface modifications are needed to reduce both adhesion and friction in micromechanical structures to solve these problems. In this paper, we will present a CVD (Chemical Vapor Deposition) process that selectively coats MEMS devices with tungsten and significantly enhances device durability. Tungsten CVD is used in the integrated-circuit industry, which makes this approach manufacturable. This selective deposition process results in a very conformal coating and can potentially address both stiction and wear problems confronting MEMS processing. The selective deposition of tungsten is accomplished through the silicon reduction of WF6. The self-limiting nature of the process ensures consistent process control. The tungsten is deposited after the removal of the sacrificial oxides to minimize stress and process integration problems. The tungsten coating adheres well and is hard and conducting, which enhances performance for numerous devices. Furthermore, since the deposited tungsten infiltrates under adhered silicon parts and the volume of W deposited is less than the amount of Si consumed, it appears to be possible to release adhered parts that are contacted over small areas such as dimples. The wear resistance of tungsten coated parts has been shown to be significantly improved by microengine test structures.
Due to extreme surface to volume ratios, adhesion and friction are critical properties for reliability of Microelectromechanical Systems (MEMS), but are not well understood. In this LDRD the authors established test structures, metrology and numerical modeling to conduct studies on adhesion and friction in MEMS. They then concentrated on measuring the effect of environment on MEMS adhesion. Polycrystalline silicon (polysilicon) is the primary material of interest in MEMS because of its integrated circuit process compatibility, low stress, high strength and conformal deposition nature. A plethora of useful micromachined device concepts have been demonstrated using Sandia National Laboratories' sophisticated in-house capabilities. One drawback to polysilicon is that in air the surface oxidizes, is high energy and is hydrophilic (i.e., it wets easily). This can lead to catastrophic failure because surface forces can cause MEMS parts that are brought into contact to adhere rather than perform their intended function. A fundamental concern is how environmental constituents such as water will affect adhesion energies in MEMS. The authors first demonstrated an accurate method to measure adhesion as reported in Chapter 1. In Chapter 2 through 5, they then studied the effect of water on adhesion depending on the surface condition (hydrophilic or hydrophobic). As described in Chapter 2, they find that adhesion energy of hydrophilic MEMS surfaces is high and increases exponentially with relative humidity (RH). Surface roughness is the controlling mechanism for this relationship. Adhesion can be reduced by several orders of magnitude by silane coupling agents applied via solution processing. They decrease the surface energy and render the surface hydrophobic (i.e. does not wet easily). However, only a molecular monolayer coats the surface. In Chapters 3-5 the authors map out the extent to which the monolayer reduces adhesion versus RH. They find that adhesion is independent of RH up to a threshold value, depending on the coating chemistry. The mechanism for the adhesion increase beyond this threshold value is that the coupling agent reconfigures from a surface to a bulk phase (Chapter 3). To investigate the details of how the adhesion increase occurs, the authors developed the mechanics for adhesion hysteresis measurements. These revealed that near-crack tip compression is the underlying cause of the adhesion increase (Chapter 4). A vacuum deposition chamber for silane coupling agent deposition was constructed. Results indicate that vapor deposited coatings are less susceptible to degradation at high RH (Chapter 5). To address issues relating to surfaces in relative motion, a new test structure to measure friction was developed. In contrast to other surface micromachined friction test structures, uniform apparent pressure is applied in the frictional contact zone (Chapter 6). The test structure will enable friction studies over a large pressure and dynamic range. In this LDRD project, the authors established an infrastructure for MEMS adhesion and friction metrology. They then characterized in detail the performance of hydrophilic and hydrophobic films under humid conditions, and determined mechanisms which limit this performance. These studies contribute to a fundamental understanding for MEMS reliability design rules. They also provide valuable data for MEMS packaging requirements.
In this paper we describe a high amplitude electrostatic drive for surface micromachined mechanical oscillators that may be suitable for vibratory gyroscopes. It is an advanced design of a previously reported dual mass oscillator (Dyck, et. al., 1999). The structure is a 2 degree-of-freedom, parallel-plate driven motion amplifier, termed the secondary mass drive oscillator (SMD oscillator). During each cycle the device contacts the drive plates, generating large electrostatic forces. Peak-to-peak amplitudes of 54 μm have been obtained by operating the structure in air with an applied voltage of 11 V. We describe the structure, present the analysis and design equations, and show recent results that have been obtained, including frequency response data, power dissipation, and out-of-plane motion.
The design, fabrication and characterization of a low-voltage rotary stepper motor are presented in this work. Using a five-level polysilicon MEMS technology, steps were taken to increase the capacitance over previous stepper motor designs to generate high torque at low voltages. A low-friction hub was developed to minimize frictional loads due to rubbing surfaces, producing an estimated resistive torque of about 6 pN-m. This design also allowed investigations into the potential benefit of using hard materials such as silicon nitride for lining of both the stationary and rotating hub components. The result is an electrostatic stepper motor capable of operation at less than six volts.
An agile microsystem manufacturing technology has been developed that provides unprecedented 5 levels of independent polysilicon surface-micromachine films for the designer. Typical surface-micromachining processes offer a maximum of 3 levels, making this the most complex surface-micromachining process technology developed to date. Leveraged from the extensive infrastructure present in the microelectronics industry, the manufacturing method of polysilicon surface-micromachining offers similar advantages of high-volume, high-reliability, and batch-fabrication to microelectromechanical systems (MEMS) as has been accomplished with integrated circuits (ICs). These systems, comprised of microscopic-sized mechanical elements, are laying the foundation for a rapidly expanding, multi-billion dollar industry 2 which impacts the automotive, consumer product, and medical industries to name only a few.
An advanced manufacturing technology which provides multi-layered polysilicon surface micromachining technology for advanced weapon systems is presented. Specifically, the addition of another design layer to a 4 levels process to create a 5 levels process allows consideration of fundamentally new architecture in designs for weapon advanced surety components.
A multi-level polysilicon surface-micromachining technology consisting of 5 layers of polysilicon is presented. Surface topography and film mechanical stress are the major impediments encountered in the development of a multilayer surface-micromachining process. However, excellent mechanical film characteristics have been obtained through the use of chemical-mechanical polishing for planarization of topography and by proper sequencing of film deposition with thermal anneals. Examples of operating microactuators, geared power-transfer mechanisms, and optical elements demonstrate the mechanical advantages of construction with 5 polysilicon layers.
Polysilicon surface-micromachining is a Micro-Electro-Mechanical Systems (MEMS) manufacturing technology where the infrastructure for manufacturing silicon integrated circuits is used to fabricate micro-miniature mechanical devices. This presentation describes a multi-level mechanical polysilicon surface-micromachining technology and includes a discussion of the issues which affect device manufacture and performance. The multi-level technology was developed and is employed primarily to fabricate microactuated mechanisms. The intricate and complex motion offered by these devices is naturally accompanied by various forms of fraction and wear in addition to the classical stiction phenomena associated with micromechanical device fabrication and usage.
Compared to other metrology approaches, electrical test structures for the measurement of dimensional characteristics such as linewidth and overlay directly relate to the electrical performance of the circuits being fabricated. The inherent disadvantage of electrical techniques is that they can be applied only to the extraction of the dimensions of features patterned in electrically-conducting materials. They can not be directly applied to patterned resist films or dielectric material layers. In the case of narrow on-wafer features patterned in resist, for example, linewidths are preferably extracted by electron-beam methods. These methods are sufficiently repeatable for monitoring fabrication-process variations. However, the traceability of the units in which linewidth is expressed is thwarted by the unavailability of suitable calibration artifacts. In the case of overlay metrology, the same limitations as regards electrical conduction apply. However, similar advantages accrue in principle to electrical overlay methods when they can be utilized. It is the electrical quality of the overlay of a conducting via relative to underlying or overlying conducting material which is of driving importance for circuit functionality. This may differ from the overlay values extracted from the same patterns by commonly-used optical overlay tools. Further refinements in the state of the art in both electrical linewidth and electrical overlay metrologies are desirable as feature sizes and spacings continue to shrink in emerging generations of devices. This paper discusses some recent innovations which have been recently introduced and indicates new roles for electrical metrology in low-cost certification of reference materials for both linewidth and overlay applications.
Measurements of the linewidths of submicrometer features made by different metrology techniques have frequently been characterized by differences of up to 90 nm. The purpose of the work reported here is to address the special difficulties that this phenomenon presents to the certification of reference materials for the calibration of linewidth-measurement instruments. Accordingly, a new test structure has been designed, fabricated, and undergone preliminary tests. Its distinguishing characteristics are assured cross-sectional profile geometries with known side-wall slopes, surface planarity, and compositional uniformity when it is formed in mono-crystalline material at selected orientations to the crystal lattice. To allow the extraction of electrical linewidth, the structure is replicated in a silicon film of uniform conductivity which is separated from the silicon substrate by a buried oxide layer. The utilization of a Silicon-On-Insulator (SKI) substrate further allows the selective removal of substrate material from local regions below the reference features, thus facilitating measurements by optical and electron-beam transmission microscopy. The combination of planar feature surfaces having known side-wall slopes is anticipated to eliminate factors which are believed to be responsible for methods divergence in linewidth measurements, a capability which is a prerequisite for reliable certification of the linewidths of features on reference materials.
Polysilicon surface micromachining is a technology for manufacturing Micro-Electro-Mechanical Systems (MEMS) which has, as its basis, the manufacturing methods and tool sets used to manufacture the integrated electronic circuit. This paper describes a three-level mechanical-polysiiicon surface-micromachining technology and includes a discussion of the advantages of this level of process complexity along with issues which affect device fabrication and performance. Historically, the primary obstacles to multi-level polysilicon fabrication were related to the severe wafer topography generated by the repetition of film depositions and etching. The introduction of Chemical Mechanical Polishing (CMP) to surface micromachining has largely removed these issues and opened significant avenues for device complexity. Several examples of three-level devices with the benefits of CMP are presented. Of primary hindrance to the widespread use of polysilicon surface micromachining, and in particular microactuation mechanisms, are issues related to the device surfaces. The closing discussion examines the potential of several latter and postfabrication processes to circumvent or to directly alleviate the surface problems.
A description of a three-level mechanical polysilicon surface-micromachining technology including a discussion of the advantages of this level of process complexity is presented. This technology is capable of forming mechanical elements ranging from simple cantilevered beams to complex, interconnected, interactive, microactuated micromechanisms. The inclusion of a third deposited layer of mechanical polysilicon greatly extends the degree of complexity available for micromechanism design. Additional features of the Sandia three-level process include the use of Chemical-Mechanical Polishing (CMP) for planarization, and the integration of micromechanics with the Sandia CMOS circuit process. The latter effort includes a CMOS-first, tungsten metallization process to allow the CMOS electronics to withstand high-temperature micromechanical processing. Alternatively, a novel micromechanics-first approach wherein the micromechanical devices are processed first in a well below the surface of the CMOS starting material followed by the standard, aluminum metallization CMOS process is also being pursued. Following the description of the polysilicon surface micromachining are examples of the major sensor and actuator projects based on this technology at the Microelectronics Development Laboratory (MDL) at Sandia National Laboratories. Efforts at the MDL are concentrated in the technology of surface micromachining due to the availability of and compatibility with standard CMOS processes. The primary sensors discussed are a silicon nitride membrane pressure sensor, hot polysilicon filaments for calorimetric gas sensing, and a smart hydrogen sensor. Examples of actuation mechanisms coupled to external devices are also presented. These actuators utilize the three-level process (plus an additional passive level) and employ either surface tension or electrostatic forces.