We apply density-functional theory calculations to predict dopant modulation of electrical conductivity (σo) for seven dopants (C, Si, Ge, H, F, N, and B) sampled at 18 quantum molecular dynamics configurations of five independent insertion sites into two (high/low) baseline references of σo in amorphous Ta2O5, where each reference contains a single, neutral O vacancy center (VO0). From this statistical population (n = 1260), we analyze defect levels, physical structure, and valence charge distributions to characterize nanoscale modification of the atomistic structure in local dopant neighborhoods. C is the most effective dopant at lowering Ta2Ox σo, while also exhibiting an amphoteric doping behavior by either donating or accepting charge depending on the host oxide matrix. Both B and F robustly increase Ta2Ox σo, although F does so through elimination of Ta high charge outliers, while B insertion conversely creates high charge O outliers through favorable BO3 group formation, especially in the low σo reference. While N applications to dope and passivate oxides are prevalent, we found that N exacerbates the stochasticity of σo we sought to mitigate; sensitivity to the N insertion site and some propensity to form N-O bond chemistries appear responsible. We use direct first-principles predictions of σo to explore feasible Ta2O5 dopants to engineer improved oxides with lower variance and greater repeatability to advance the manufacturability of resistive memory technologies.
Parasitic resistances cause devices in a resistive memory array to experience different read/write voltages depending on the device location, resulting in uneven writes and larger leakage currents. We present a new method to compensate for this by adding extra series resistance to the drivers to equalize the parasitic resistance seen by all the devices. This allows for uniform writes, enabling multi-level cells with greater numbers of distinguishable levels, and reduced write power, enabling larger arrays.
The brain is capable of massively parallel information processing while consuming only ~1-100 fJ per synaptic event1,2. Inspired by the efficiency of the brain, CMOS-based neural architectures3 and memristors4,5 are being developed for pattern recognition and machine learning. However, the volatility, design complexity and high supply voltages for CMOS architectures, and the stochastic and energy-costly switching of memristors complicate the path to achieve the interconnectivity, information density, and energy efficiency of the brain using either approach. Here we describe an electrochemical neuromorphic organic device (ENODe) operating with a fundamentally different mechanism from existing memristors. ENODeswitches at lowvoltage and energy (<10 pJ for 103 μm2 devices), displays >500 distinct, non-volatile conductance states within a~1V range, and achieves high classification accuracy when implemented in neural network simulations. Plastic ENODes are also fabricated on flexible substrates enabling the integration of neuromorphic functionality in stretchable electronic systems6,7. Mechanical flexibility makes ENODes compatible with three-dimensional architectures, opening a path towards extreme interconnectivity comparable to the human brain.
Biological neural networks continue to inspire new developments in algorithms and microelectronic hardware to solve challenging data processing and classification problems. Here, we survey the history of neural-inspired and neuromorphic computing in order to examine the complex and intertwined trajectories of the mathematical theory and hardware developed in this field. Early research focused on adapting existing hardware to emulate the pattern recognition capabilities of living organisms. Contributions from psychologists, mathematicians, engineers, neuroscientists, and other professions were crucial to maturing the field from narrowly-tailored demonstrations to more generalizable systems capable of addressing difficult problem classes such as object detection and speech recognition. Algorithms that leverage fundamental principles found in neuroscience such as hierarchical structure, temporal integration, and robustness to error have been developed, and some of these approaches are achieving world-leading performance on particular data classification tasks. In addition, novel microelectronic hardware is being developed to perform logic and to serve as memory in neuromorphic computing systems with optimized system integration and improved energy efficiency. Key to such advancements was the incorporation of new discoveries in neuroscience research, the transition away from strict structural replication and towards the functional replication of neural systems, and the use of mathematical theory frameworks to guide algorithm and hardware developments.
Resistive memories enable dramatic energy reductions for neural algorithms. We propose a general purpose neural architecture that can accelerate many different algorithms and determine the device properties that will be needed to run backpropagation on the neural architecture. To maintain high accuracy, the read noise standard deviation should be less than 5% of the weight range. The write noise standard deviation should be less than 0.4% of the weight range and up to 300% of a characteristic update (for the datasets tested). Asymmetric nonlinearities in the change in conductance vs pulse cause weight decay and significantly reduce the accuracy, while moderate symmetric nonlinearities do not have an effect. In order to allow for parallel reads and writes the write current should be less than 100 nA as well.
Electrical performance and characterization of deep levels in vertical GaN P-i-N diodes grown on low threading dislocation density (∼104 - 106cm-2) bulk GaN substrates are investigated. The lightly doped n drift region of these devices is observed to be highly compensated by several prominent deep levels detected using deep level optical spectroscopy at Ec-2.13, 2.92, and 3.2 eV. A combination of steady-state photocapacitance and lighted capacitance-voltage profiling indicates the concentrations of these deep levels to be Nt = 3 × 1012, 2 × 1015, and 5 × 1014cm-3, respectively. The Ec-2.92 eV level is observed to be the primary compensating defect in as-grown n-type metal-organic chemical vapor deposition GaN, indicating this level acts as a limiting factor for achieving controllably low doping. The device blocking voltage should increase if compensating defects reduce the free carrier concentration of the n drift region. Understanding the incorporation of as-grown and native defects in thick n-GaN is essential for enabling large VBD in the next-generation wide-bandgap power semiconductor devices. Thus, controlling the as-grown defects induced by epitaxial growth conditions is critical to achieve blocking voltage capability above 5 kV.
Resistive memories enable dramatic energy reductions for neural algorithms. We propose a general purpose neural architecture that can accelerate many different algorithms and determine the device properties that will be needed to run backpropagation on the neural architecture. To maintain high accuracy, the read noise standard deviation should be less than 5% of the weight range. The write noise standard deviation should be less than 0.4% of the weight range and up to 300% of a characteristic update (for the datasets tested). Asymmetric nonlinearities in the change in conductance vs pulse cause weight decay and significantly reduce the accuracy, while moderate symmetric nonlinearities do not have an effect. In order to allow for parallel reads and writes the write current should be less than 100 nA as well.
Byung, Jc; Torrezan, Antonio C.; Strachan, John P.; Kotula, Paul G.; Lohn, A.J.; Marinella, Matthew; Li, Zhiyong; Williams, R.S.; Yang, J.J.
High-performance memristors based on AlN films have been demonstrated, which exhibit ultrafast ON/OFF switching times (≈85 ps for microdevices with waveguide) and relatively low switching current (≈15 μA for 50 nm devices). Physical characterizations are carried out to understand the device switching mechanism, and rationalize speed and energy performance. The formation of an Al-rich conduction channel through the AlN layer is revealed. The motion of positively charged nitrogen vacancies is likely responsible for the observed switching.
We present a study of the 'snap-back' regime of resistive switching hysteresis in bipolar TaOx memristors, identifying power signatures in the electronic transport. Using a simple model based on the thermal and electric field acceleration of ionic mobilities, we provide evidence that the 'snap-back' transition represents a crossover from a coupled thermal and electric-field regime to a primarily thermal regime, and is dictated by the reconnection of a ruptured conducting filament. We discuss how these power signatures can be used to limit filament radius growth, which is important for operational properties such as power, speed, and retention.
First-principles calculations of electrical conductivity (σo) are revisited to determine the atomistic origin of its stochasticity in a distribution generated from sampling 14 ab-initio molecular dynamics configurations from 10 independently quenched models (n = 140) of substoichiometric amorphous Ta2O5, where each structure contains a neutral O monovacancy (VO0). Structural analysis revealed a distinct minimum Ta-Ta separation (dimer/trimer) corresponding to each VO0 location. Bader charge decomposition using a commonality analysis approach based on the σo distribution extremes revealed nanostructural signatures indicating that both the magnitude and distribution of cationic charge on the Ta subnetwork have a profound influence on σo. Furthermore, visualization of local defect structures and their electron densities reinforces these conclusions and suggests σo in the amorphous oxide is best suppressed by a highly charged, compact Ta cation shell that effectively screens and minimizes localized VO0 interaction with the a-Ta2O5 network; conversely, delocalization of VO0 corresponds to metallic character and high σo. The random network of a-Ta2O5 provides countless variations of an ionic configuration scaffold in which small perturbations affect the electronic charge distribution and result in a fixed-stoichiometry distribution of σo; consequently, precisely controlled and highly repeatable oxide fabrication processes are likely paramount for advancement of resistive memory technologies.
The exponential increase in data over the last decade presents a significant challenge to analytics efforts that seek to process and interpret such data for various applications. Neural-inspired computing approaches are being developed in order to leverage the computational properties of the analog, low-power data processing observed in biological systems. Analog resistive memory crossbars can perform a parallel read or a vector-matrix multiplication as well as a parallel write or a rank-1 update with high computational efficiency. For an N × N crossbar, these two kernels can be O(N) more energy efficient than a conventional digital memory-based architecture. If the read operation is noise limited, the energy to read a column can be independent of the crossbar size (O(1)). These two kernels form the basis of many neuromorphic algorithms such as image, text, and speech recognition. For instance, these kernels can be applied to a neural sparse coding algorithm to give an O(N) reduction in energy for the entire algorithm when run with finite precision. Sparse coding is a rich problem with a host of applications including computer vision, object tracking, and more generally unsupervised learning.
As CMOS technology approaches the end of its scaling, oxide-based memristors have become one of the leading candidates for post-CMOS memory and logic devices. To facilitate the understanding of physical switching mechanisms and accelerate experimental development of memristors, we have developed a three-dimensional fully-coupled electrical and thermal transport model, which captures all the important processes that drive memristive switching and is applicable for simulating a wide range of memristors. The model is applied to simulate the RESET and SET switching in a 3D filamentary TaOx memristor. Extensive simulations show that the switching dynamics of the bipolar device is determined by thermally-activated field-dominant processes: with Joule heating, the raised temperature enables the movement of oxygen vacancies, and the field drift dominates the overall motion of vacancies. Simulated current-voltage hysteresis and device resistance profiles as a function of time and voltage during RESET and SET switching show good agreement with experimental measurement.
Final report for Cognitive Computing for Security LDRD 165613. It reports on the development of hybrid of general purpose/ne uromorphic computer architecture, with an emphasis on potential implementation with memristors.
As transistors start to approach fundamental limits and Moore's law slows down, new devices and architectures are needed to enable continued performance gains. New approaches based on RRAM (resistive random access memory) or memristor crossbars can enable the processing of large amounts of data[1, 2]. One of the most promising applications for RRAM crossbars is brain inspired or neuromorphic computing[3, 4].
As transistors start to approach fundamental limits and Moore's law slows down, new devices and architectures are needed to enable continued performance gains. New approaches based on RRAM (resistive random access memory) or memristor crossbars can enable the processing of large amounts of data[1, 2]. One of the most promising applications for RRAM crossbars is brain inspired or neuromorphic computing[3, 4].