Wong, Man H.; Bierwagen, Oliver; Kaplar, Robert; Umezawa, Hitoshi
Ultrawide-bandgap (UWBG) semiconductor technology is presently going through a renaissance exemplified by advances in material-level understanding, extensions of known concepts to new materials, novel device concepts, and new applications. This focus issue presents a timely selection of papers spanning the current state of the art in UWBG materials and applications, including both experimental results and theoretical developments. It covers broad research subtopics on UWBG bulk crystals and substrate technologies, UWBG defect science and doping, UWBG epitaxy, UWBG electronic and optoelectronic properties, and UWBG power devices and emitters. In this overview article, we consolidate the fundamentals and background of key UWBG semiconductors including aluminum gallium nitride alloys (AlxGa1–xN), boron nitride (BN), diamond, β-phase gallium oxide (β-Ga2O3), and a number of other UWBG binary and ternary oxides. Graphical Abstract: [Figure not available: see fulltext.]
This work provides the first demonstration of vertical GaN Junction Barrier Schottky (JBS) rectifiers fabricated by etch and regrowth of p-GaN. A reverse blocking voltage near 1500 V was achieved at 1 mA reverse leakage, with a sub 1 V turn-on and a specific on-resistance of 10 mΩ-cm2. This result is compared to other reported JBS devices in the literature and our device demonstrates the lowest leakage slope at high reverse bias. A large initial leakage current is present near zero-bias which is attributed to a combination of inadequate etch-damage removal and passivation induced leakage current.
Ultra-wide-bandgap aluminum gallium nitride (AlGaN) possesses several material properties that make it attractive for use in a variety of applications. This chapter focuses on power switching and radio-frequency (RF) devices based on Al-rich AlGaN heterostructures. The relevant figures of merit for both power switching and RF devices are discussed as motivation for the use of AlGaN heterostructures in such applications. The key physical parameters impacting these figures of merit include critical electric field, channel mobility, channel carrier density, and carrier saturation velocity, and the factors influencing these and the trade-offs between them are discussed. Surveys of both power switching and RF devices are given and their performance is described including in special operating regimes such as at high temperatures. Challenges to be overcome, such as the formation of low-resistivity Ohmic contacts, are presented. Finally, an overview of processing-related challenges, especially related to surfaces and interfaces, concludes the chapter.
This study analyzes the ability of various processing techniques to reduce leakage current in vertical GaN MOS devices. Careful analysis is required to determine suitable gate dielectric materials in vertical GaN MOSFET devices since they are largely responsible for determination of threshold voltage, gate leakage reduction, and semiconductor/dielectric interface traps. SiO2, Al2 O3, and HfO2 films were deposited by Atomic Layer Deposition (ALD) and subjected to treatments nominally identical to those in a vertical GaN MOSFET fabrication sequence. This work determines mechanisms for reducing gate leakage by reduction of surface contaminants and interface traps using pre-deposition cleans, elevated temperature depositions, and post-deposition anneals. Breakdown measurements indicate that ALD Al2O3 is an ideal candidate for a MOSFET gate dielectric, with a breakdown electric field near 7.5 MV/cm with no high temperature annealing required to increase breakdown strength. SiO2 ALD films treated with a post deposition anneal at 850 °C for 30 minutes show significant reduction in leakage current while maintaining breakdown at 5.5 MV/cm. HfO2 films show breakdown nominally identical to annealed SiO2 films, but with significantly higher leakage. Additionally, HfO2 films show more sensitivity to high temperature annealing suggesting that more research into surface cleans is necessary to improving these films for MOSFET gate applications.
This work reports an on-wafer study of avalanche behavior and failure analysis of in-house fabricated 1.3 kV GaN-on-GaN P-N diodes. DC breakdown is measured at different temperatures to confirm avalanche behavior. Diode's avalanche ruggedness is measured directly on-wafer using a modified unclamped inductive switching (UIS) test set-up with an integrated thermal chuck and high-speed CCD for real-time imaging during the test. The avalanche ruggedness of the GaN P-N diode is evaluated and compared with a commercial SiC Schottky diode of similar voltage and current rating. Failure analysis is done using SEM and optical microscopy to gain insight into the diode's failure mechanism during avalanche operation.
Optimized designs were achieved using a genetic algorithm to evaluate multi-objective trade space, including Mean-Time-Between-Failure (MTBF) and volumetric power density. This work provides a foundational platform that can be used to optimize additional power converters, such as an inverter for the EV traction drive system as well as trade-offs in thermal management due to the use of different device substrate materials.
Ebrish, Mona A.; Anderson, Travis J.; Koehler, Andrew D.; Foster, Geoffrey M.; Gallagher, James C.; Kaplar, Robert; Gunning, Brendan P.; Hobart, Karl D.
GaN is a favorable martial for future efficient high voltage power switches. GaN has not dominated the power electronics market due to immature substrate, homoepitaxial growth, and immature processing technology. Understanding the impact of the substrate and homoepitaxial growth on the device performance is crucial for boosting the performance of GaN. In this work, we studied vertical GaN PiN diodes that were fabricated on non-homogenous Hydride Vapor Phase Epitaxy (HVPE) substrates from two different vendors. We show that defects which stemmed from growth techniques manifest themselves as leakage hubs. Different non-homogenous substrates showed different distribution of those defects spatially with the lesser quality substrates clustering those defects in clusters that causes pre-mature breakdown. Energetically these defects are mostly mid-gap around 1.8Ev with light emission spans from 450nm to 700nm. Photon emission spectrometry and hyperspectral electroluminescence were used to locate these defects spatially and energetically.
In power electronic applications, reliability and power density are a few of the many important performance metrics that require continual improvement in order to meet the demand of today's complex electrical systems. However, due to the complexity of the synergy between various components, it is challenging to visualize and evaluate the effects of choosing one component over another and what certain design parameters impose on the overall reliability and lifetime of the system. Furthermore, many areas of electronics have realized remarkable innovation in the integration of new materials of passive and active components; wide-bandgap semiconductor devices and new magnetic materials allow higher operating temperature, blocking voltage, and switching frequency; all of which enable much more compact power converter designs. However, uncertainty remains in the overall electronics reliability in different design variations. Hence, in order to better understand the relationship between reliability and power density in a power electronic system, this paper utilizes a genetic algorithm (GA) to provide pareto optimal solution sets in a multi-variate trade space that relates the Mean Time Between Failures (MTBF) and volumetric power density for the design of a 5 kW synchronous boost converter. Different designs of the synchronous boost converter based on the variation of the electrical parameters and material types for the passive (input and output capacitors, the boost inductor, and the heatsink) and active components (switches) have been studied. A few candidate designs have been evaluated and verified through hardware experiments.
Researchers have been extensively studying wide-bandgap (WBG) semiconductor materials such as gallium nitride (GaN) with an aim to accomplish an improvement in size, weight, and power of power electronics beyond current devices based on silicon (Si). However, the increased operating power densities and reduced areal footprints of WBG device technologies result in significant levels of self-heating that can ultimately restrict device operation through performance degradation, reliability issues, and failure. Typically, self-heating in WBG devices is studied using a single measurement technique while operating the device under steady-state direct current measurement conditions. However, for switching applications, this steady-state thermal characterization may lose significance since the high power dissipation occurs during fast transient switching events. Therefore, it can be useful to probe the WBG devices under transient measurement conditions in order to better understand the thermal dynamics of these systems in practical applications. In this work, the transient thermal dynamics of an AlGaN/GaN high electron mobility transistor (HEMT) were studied using thermoreflectance thermal imaging and Raman thermometry. Also, the proper use of iterative pulsed measurement schemes such as thermoreflectance thermal imaging to determine the steady-state operating temperature of devices is discussed. These studies are followed with subsequent transient thermal characterization to accurately probe the self-heating from steady-state down to submicrosecond pulse conditions using both thermoreflectance thermal imaging and Raman thermometry with temporal resolutions down to 15 ns.
Proper edge termination is required to reach large blocking voltages in vertical power devices. Limitations in selective area p-type doping in GaN restrict the types of structures that can be used for this purpose. A junction termination extension (JTE) can be employed to reduce field crowding at the junction periphery where the charge in the JTE is designed to sink the critical electric field lines at breakdown. One practical way to fabricate this structure in GaN is by a step-etched single-zone or multi-zone JTE where the etch depths and doping levels are used to control the charge in the JTE. The multi-zone JTE is beneficial for increasing the process window and allowing for more variability in parameter changes while still maintaining a designed percentage of the ideal breakdown voltage. Impact ionization parameters reported in literature for GaN are compared in a simulation study to ascertain the dependence on breakdown performance. Two 3-zone JTE designs utilizing different impact ionization coefficients are compared. Simulations confirm that the choice of impact ionization parameters affects both the predicted breakdown of the device as well as the fabrication process variation tolerance for a multi-zone JTE. Regardless of the impact ionization coefficients utilized, a step-etched JTE has the potential to provide an efficient, controllable edge termination design.
Advances in FinFET design and fabrication enable manufacturing of denser, more compact integrated circuits (ICs) with substantially reduced leakage while shortening the channel-lengths. The same stress-induced leakage and breakdown degradation mechanisms that affect planar transistors also impact FinFET devices. Reliability concerns such as Bias Temperature Instability (BTI), Time Dependent Dielectric Breakdown (TDDB), and Hot Carrier Injection (HCI) become very important with changes to transistor geometry and fin sidewall crystal orientation. Recent testing has shown that FinFETs respond differently to radiation (radiation effects such as total ionizing dose) when compared to planar transistors. These reliability and radiation effects issues become very important when changing transistor geometry and scaling FinFETs towards smaller feature sizes (22-nm, 16-nm, 14- nm, 10-nm, and smaller critical dimensions). The comparable 2019 state of the art transistor densities in current high-volume manufacturing silicon-based foundries is 7-nm (ISMC, Samsung) and 10-nm (Intel) [www.anandtech.com,fuse.wikichip.org]. Released products include supporting components for the cellphone and commercial microprocessor markets respectively. Extensive development in the foundry industry is driving to a 5-nm technology node in late 2020.
High-temperature optical analysis of three different InGaN/GaN multiple quantum well (MQW) light-emitting diode (LED) structures (peak wavelength λp = 448, 467, and 515 nm) is conducted for possible integration as an optocoupler emitter in high density power electronic modules. The commercially available LEDs, primarily used in the display (λp = 467 and 515 nm) and lighting (λp = 448 nm) applications, are studied and compared to evaluate if they can satisfy the light output requirements in the optocouplers at high temperatures. The temperature- and intensity-dependent electroluminescence (T-IDEL) measurement technique is used to study the internal quantum efficiency (IQE) of the LEDs. All three LEDs exhibit above 70% IQE at 500 K and stable operation at 800 K without flickering or failure. At 800 K, a promising IQE of above 40% is observed for blue for display (BD) (λp = 467 nm) and green for display (GD) (λp = 515 nm) samples. The blue for light (BL) (λp = 448 nm) sample shows 24% IQE at 800 K.