Publications

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Density-functional theory calculations, ab-initio molecular dynamics, and the Kubo-Greenwood formula are applied to predict electrical conductivity in Ta2Ox (0 x 5) as a function of composition, phase, and temperature, where additional focus is given to various oxidation states of the O monovacancy (VOn; n=0,1+,2+). Our calculations of DC conductivity at 300K agree well with experimental measurements taken on Ta2Ox thin films and bulk Ta2O5 powder-sintered pellets, although simulation accuracy can be improved for the most insulating, stoichiometric compositions. Our conductivity calculations and further interrogation of the O-deficient Ta2O5 electronic structure provide further theoretical basis to substantiate VO0 as a donor dopant in Ta2O5 and other metal oxides. Furthermore, this dopant-like behavior appears specific to neutral VO cases in both Ta2O5 and TiO2 and was not observed in other oxidation states. This suggests that reduction and oxidation reactions may effectively act as donor activation and deactivation mechanisms, respectively, for VO0 in transition metal oxides.

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Resistive random access memory (ReRAM) has become a promising candidate for next-generation high-performance non-volatile memory that operates by electrically tuning resistance states via modulating vacancy concentrations. Here, we demonstrate a wafer-scale process for resistive switching in tantalum oxide that is completely CMOS compatible. The resulting devices are forming-free and with greater than 1x10⁵ cycle endurance.

Standard deposition processes for depositing ReRAM oxides utilize mass flow of reactive gas to control stoichiometry and have difficulty depositing a precisely defined sub-stoichiometry within a "forbidden region" where film properties are discontinuous with mass flow. We show that by maintaining partial pressure within this discontinuous "forbidden region," instead of by maintaining mass flow, we can optimize tantalum oxide device properties and reduce or eliminate the electroforming step. We also show that defining the partial pressure set point as a fraction of the "forbidden region" instead of as an absolute value can be used to improve wafer-to-wafer consistency with minimal recalibration efforts. © 2013 AIP Publishing LLC.

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In the not too distant future, the traditional memory and storage hierarchy of may be replaced by a single Storage Class Memory (SCM) device integrated on or near the logic processor. Traditional magnetic hard drives, NAND flash, DRAM, and higher level caches (L2 and up) will be replaced with a single high performance memory device. The Storage Class Memory paradigm will require high speed (1012), nonvolatility (retention >10 years), and low switching energies (< 10 pJ per switch). The International Technology Roadmap for Semiconductors (ITRS) has recently evaluated several potential candidates SCM technologies, including Resistive (or Redox) RAM, Spin Torque Transfer RAM (STT-MRAM), and phase change memory (PCM). All of these devices show potential well beyond that of current flash technologies and research efforts are underway to improve the endurance, write speeds, and scalabilities to be on-par with DRAM. This progress has interesting implications for space electronics: each of these emerging device technologies show excellent resistance to the types of radiation typically found in space applications. Commercially developed, high density storage class memory-based systems may include a memory that is physically radiation hard, and suitable for space applications without major shielding efforts. This paper reviews the Storage Class Memory concept, emerging memory devices, and possible applicability to radiation hardened electronics for space. © 2013 IEEE.