New insights gained on mechanisms of low-energy proton-induced SEUs by minimizing energy straggle
Abstract not provided.
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Jump to search filtersNew insights gained on mechanisms of low-energy proton-induced SEUs by minimizing energy straggle
Abstract not provided.
Modeling of Single Event Transients with Dual Double-Exponential Current Sources: Implications for Logic Cell Characterization
IEEE Transactions on Nuclear Science
Single event effects (SEE) are a reliability concern for modern microelectronics. Bit corruptions can be caused by single event upsets (SEUs) in the storage cells or by sampling single event transients (SETs) from a logic path. An accurate prediction of soft error susceptibility from SETs requires good models to convert collected charge into compact descriptions of the current injection process. This paper describes a simple, yet effective, method to model the current waveform resulting from a charge collection event for SET circuit simulations. The model uses two double-exponential current sources in parallel, and the results illustrate why a conventional model based on one double-exponential source can be incomplete. A small set of logic cells with varying input conditions, drive strength, and output loading are simulated to extract the parameters for the dual double-exponential current sources. The parameters are based upon both the node capacitance and the restoring current (i.e., drive strength) of the logic cell.
Single Event Effects Testing Results in Sandia National Laboratories Via Programmable ASIC Platforms
Abstract not provided.
Reduced Complexity RHBD Logic Cells for 32-nm SOI ASICs
Abstract not provided.
Reduced Complexity RHBD Logic Cells for 32-nm SOI ASICs
Abstract not provided.
Six Generations of ViArray Rad-Hard Structured ASICs
Abstract not provided.
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