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MEMS packaging - Current issues and approaches

Proceedings of SPIE - The International Society for Optical Engineering

Dressendorfer, Paul V.; Peterson, David A.; Reber, Cathy A.

The assembly and packaging of MEMS (Microelectromechanical Systems) devices raise a number of issues over and above those normally associated with the assembly of standard microelectronic circuits. MEMS components include a variety of sensors, microengines, optical components, and other devices. They often have exposed mechanical structures which during assembly require particulate control, free space in the package, non-contact handling procedures, low-stress die attach, precision die placement, unique process schedules, hermetic sealing in controlled environments (including vacuum), and other special constraints. These constraints force changes in the techniques used to separate die on a wafer, in the types of packages which can be used, in the assembly processes and materials, and in the sealing environment and process. This paper discusses a number of these issues and provides information on approaches being taken or proposed to address them.

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Characterization of the Effect of Au/Al Bondpad Corrosion on Microelectronic Device Reliability

Sorensen, Neil R.; Braithwaite, J.W.; Peterson, David A.; Robinson, David G.; Michael, Joseph R.

A methodology has been established to predict the effect of atmospheric corrosion on the reliability of plastic encapsulated microelectronic (PEM) devices. New experimental techniques were developed to directly characterize the Al/Au wirebond interface where corrosion primarily occurs. A deterministic empirical model describing wirebond degradation as a function of environmental conditions was generated. To demonstrate how this model can be used to determine corrosion effects on device reliability, a numerical simulation was performed on a three-lead voltage reference device. Surface reaction rate constants, environmental variables and the defect characteristics of the encapsulant were treated as distributed parameters. A Sandia-developed analytical framework (CRAX{trademark}) was used to include uncertainty in the analysis and directly calculate reliability.

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Experiment-Based Computational Investigation of Thermomechanical Stresses in Flip Chip BGA Using the ATC4.2 Test Vehicle

Peterson, David A.

Stress measurement test chips were flip chip assembled to organic BGA substrates containing micro-vias and epoxy build-up interconnect layers. Mechanical degradation observed during temperature cycling was correlated to a damage theory developed based on 3D finite element method analysis. Degradation included die cracking, edge delamination and radial fillet cracking.

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Validating theoretical calculations of thermomechanical stress and deformation using the ATC4.1 flip-chip test vehicle

Peterson, David A.

Two closed form analytical solutions for tri-material thermomechanical stress and deformation, along with one-quarter section finite element model (FEM), were validated using an in-situ CMOS piezoresistive stress measurement test chip that has been repatterened into a fine pitch area array flip-chip. A special printed circuit board substrate for the test chip was designed at Sandia and fabricated by the Hadco Corp. The flip-chip solder attach (FCA) and underfill was performed by a SEMATECH member company. The measured incremental stresses produced by the underfill are reported and discussed for two underfill materials used in this experiment. Detailed comparisons between theory and experiment are presented and discussed.

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6 Results
6 Results