Publications

Abstract not provided.

Soldered joints can be made with a wide range of base materials and filler metals that allow the assembly to meet its performance and reliability requirements. Structural solder joints have, as their foremost requirement, to provide mechanical attachment between base material structures. The joint is typically subjected to one, or a combination of, three loading configurations: (a) tensile or compressive force, (b) shear force, or (c) peel force. Solder filler metals and in particular, the so-called “soft solders” based on tin (Sn), lead (Pb), and indium (In), generally have a bulk strength that is less than that of the base materials. Finally, deformation occurs largely in the solder when the joint is subjected to an applied force.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

This report examines the role of interfaces in electronic packaging applications with the focus placed on soldering technology. Materials and processes are described with respect to their roles on the performance and reliability of associated interfaces. The discussion will also include interface microstructures created by coatings and finishes that are frequently used in packaging applications. Numerous examples are cited to illustrate the importance of interfaces in physical and mechanical metallurgy as well as the engineering function of interconnections. Regardless of the specific application, interfaces are non-equilibrium structures, which has important ramifications for the long-term reliability of electronic packaging.

This Part 2 study examined the microstructural characteristics of braze joints made between two KOVar^TM base materials using the filler metals, Ag-xAl, having x = 0, 2, 5, and 10 wt.% Al additions. Brazing processes had temperatures of 965°C (1769°F) and 995°C and brazing times of 5 and 20 min. All brazing was performed under high vacuum.

This study examined the cause of nonwetted regions of the gold (Au) finish on iron-nickel (Fe-Ni) alloy lids that seal ceramic packages using the 80Au-20Sn solder (wt %, abbreviated Au-Sn) and their impact on the final lid-to-ceramic frame solder joint. The Auger electron spectroscopy (AES) surface and depth profile techniques identified surface and through-thickness contaminants in the Au metallization layer. In one case, the AES analysis identified background levels of carbon (C) contamination on the surface; however, the depth profile detected Fe and Ni contaminants that originated from the plating process. The Fe and Ni could impede the completion of wetting and spreading to the edge of the Au metallization. The Au layer of lids not exposed to a Au-Sn solder reflow step had significant surface and through-thickness C contamination. Inorganic contaminants were absent. Subsequent simulated reflow processes removed the C contamination from the Au layer without driving Ni diffusion from the underlying solderable layer. An Au metallization having negligible C contamination developed elevated C levels after exposure to a simulated reflow process due to C contamination diffusing into it from the underlying Ni layer. However, the second reflow step removed that contamination from the Au layer, thereby allowing the metallization to support the formation of lid-to-ceramic frame Au-Sn joints without risk to their mechanical strength or hermeticity.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Materials aging is a high-consequence failure mode in electronic systems. Such mechanisms can degrade the electrical properties of connectors, relays, wire bonds, and other interconnections. Lost performance will impact, not only that of the device, but also the function and reliability of next-level assemblies and the weapons system as a whole. The detections of changes to materials surfaces at the nanometer-scale resolution, provides a means to identify aging processes at their early stages before they manifest into latent failures that affect system-level performance and reliability. Diffusion will be studied on thin films that undergo accelerated aging using the nanometer scale characterization technique of Frequency Modulated Kelvin Probe Force Microscopy (FM-KPFM). The KPFM provides a relatively easy, non-destructive methodology that does not require high-vacuum facilities to obtain nanometer spatial resolution of surface chemistry changes. The KPFM method can provide the means to measure surface, and near-surface, elemental concentrations that allow the determination of diffusion rate kinetics. These attributes will be illustrated by assessing diffusion in a thin film couple. Validation data will obtained from traditional techniques: (a) Auger electron spectroscopy (AES), x-ray fluorescence (XRF), and xray photoelectron spectroscopy (XPS).

Materials aging is a high-consequence failure mode in electronic systems. Such mechanisms can degrade the electrical properties of connectors, relays, wire bonds, and other interconnections. Lost performance will impact, not only that of the device, but also the function and reliability of next-level assemblies and the weapons system as a whole. The detections of changes to materials surfaces at the nanometer-scale resolution, provides a means to identify aging processes at their early stages before they manifest into latent failures that affect system-level performance and reliability. Diffusion will be studied on thin films that undergo accelerated aging using the nanometer scale characterization technique of Frequency Modulated Kelvin Probe Force Microscopy (FM-KPFM). The KPFM provides a relatively easy, non-destructive methodology that does not require high-vacuum facilities to obtain nanometer spatial resolution of surface chemistry changes. The KPFM method can provide the means to measure surface, and near-surface, elemental concentrations that allow the determination of diffusion rate kinetics. These attributes will be illustrated by assessing diffusion in a thin film couple. Validation data will obtained from traditional techniques: (a) Auger electron spectroscopy (AES), x-ray fluorescence (XRF), and xray photoelectron spectroscopy (XPS).

Abstract not provided.

Abstract not provided.

The run-out phenomenon was observed in Ag-Cu-Zr active braze joints made between the alumina ceramic and Kovar™ base material. Run-out introduces a significant yield loss by generating functional and/or cosmetic defects in brazements. A prior study identified a correlation between run-out and the aluminum (Al) released by the reduction/oxidation and the latter’s reaction with the Kovar™ base material. A study was undertaken to understand the fundamental principles of run-out by examining the interface reaction between Ag-xAl filler metals (x=2, 5, and 10 wt.%) and Kovar™ base material. Sessile drop samples were fabricated using brazing temperatures of 965°C or 995°C and times of 5 min or 20 min. The correlation was made between the degree of wetting-and-spreading by the sessile drops and the run-out phenomenon. Wetting-and-spreading increased with Al content (x) of the Ag-xAl filler metal, but was largely insensitive to the brazing process parameters. The increased Al concentration resulted in higher Al contents of the (Fe, Ni, Co)_xAl_y reaction layer. Run-out was predicted when the filler metal has a locally-elevated, Al content exceeding 2 – 5 wt.%. Lastly, several mitigation strategies were proposed, based upon these findings.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Whether structural or electronic, all solder joints must provide the necessary level of reliability for the application. The Part 1 report examined the effects of filler metal properties and the soldering process on joint reliability. Filler metal solderability and mechanical properties, as well as the extents of base material dissolution and interface reaction that occur during the soldering process, were shown to affect reliability performance. The continuation of this discussion is presented in this Part 2 report, which highlights those factors that directly affect solder joint reliability. There is the growth of an intermetallic compound (IMC) reaction layer at the solder/base material interface by means of solid-state diffusion processes. In terms of mechanical response by the solder joint, fatigue remains as the foremost concern for long-term performance. Thermal mechanical fatigue (TMF), a form of low-cycle fatigue (LCF), occurs when temperature cycling is combined with mismatched values of the coefficient of thermal expansion (CTE) between materials comprising the solder joint “system.” Vibration environments give rise to high-cycle fatigue (HCF) degradation. Although accelerated aging studies provide valuable empirical data, too many variants of filler metals, base materials, joint geometries, and service environments are forcing design engineers to embrace computational modeling to predict the long-term reliability of solder joints.

Abstract not provided.

Soldering technology has made tremendous strides in the past half-century. Whether structural or electronic, all solder joints must provide a level of reliability that is required by the application. This Part 1 report examines the effects of filler metal properties and soldering process on joint reliability. Solder alloy composition must have the appropriate melting and mechanical properties that suit the product's assembly process(es) and use environment. The filler metal must also optimize solderability (wetting-and-spreading) to realize the proper joint geometry. Here, the soldering process also affects joint reliability. The choice of flux and thermal profile support the solderability performance of the molten filler metal to successfully fill the gap and complete the fillet.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Low temperature cofired ceramic (LTCC) technology has proven itself in military/space electronics, wireless communication, microsystems, medical and automotive electronics, and sensors. The use of LTCC for high frequency applications is appealing due to its low losses, design flexibility and packaging and integration capability. The LTCC thick film process is summarized including some unconventional process steps such as feature machining in the unfired state and thin film definition of outer layer conductors. The LTCC thick film process was characterized to optimize process yields by focusing on these factors: 1) Print location, 2) Print thickness, 3) Drying of tapes and panels, 4) Shrinkage upon firing, and 5) Via topography. Statistical methods were used to analyze critical process and product characteristics in the determination towards that optimization goal.

Abstract not provided.

Abstract not provided.

Tin (Sn) whiskers are not a recent development. Studies in the late 1930’s investigated thin filaments that grew spontaneously from Sn coatings used for the corrosion protection of electronic hardware. It was soon recognized that these Sn filaments, or whiskers, could create short circuits in the same electronic equipment. Figure 1a illustrates whisker growth in the hole of a printed circuit board having an immersion Sn surface finish. The engineering solution was to contaminate the Sn with > 3 wt.% of lead (Pb). The result was that whisker growth was replaced with hillock formation (Fig. 1b) that posed a minimal reliability concern to electrical circuits. Today, Pb-containing finishes are being replaced with pure Sn coatings to meet environmental restrictions on Pb use. The same short-circuit concerns have been raised, once again, with respect to Sn whiskers.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Tin (Sn) whiskers are not a recent development. Studies in the late 1930’s investigated thin filaments that grew spontaneously from Sn coatings used for the corrosion protection of electronic hardware. It was soon recognized that these Sn filaments,or whiskers, could create short circuits in the same electronic equipment. Figure 1a illustrates whisker growth in the hole of a printed circuit board having an immersion Sn surface finish. The engineering solution was to contaminate the Sn with > 3wt.% of lead (Pb). The result was that whisker growth was replaced with hillock formation (Fig. 1b) that posed a minimal reliability concernto electrical circuits. Today, Pb-containing finishes are being replaced with pure Sn coatings to meet environmental restrictions on Pb use. The same short-circuit concerns have been raised, once again, with respect to Sn whiskers. The present authors have taken the approach that, in order to develop more widely applicable, first-principles strategies to mitigate Sn whisker formation, it is necessary to understand the fundamental mechanism(s) and rate kinetics underlying their development. Numerous mechanisms have been proposed by other authors to describe whisker growth, including static recrystallization by Boguslavsky and Bush.

Our study was performed to validate a first-principles model for whisker and hillock formation based on the cyclic dynamic recrystallization (DRX) mechanism in conjunction with long-range diffusion. The test specimens were evaporated Sn films on Si having thicknesses of 0.25 μm, 0.50 μm, 1.0 μm, 2.0 μm, and 4.9 μm. Air annealing was performed at 35°C, 60°C, 100°C, 120°C, or 150°C over a time duration of 9 days. The stresses, anelastic strains, and strain rates in the Sn films were predicted by a computational model based upon the constitutive properties of 95.5Sn-3.9Ag-0.6Cu (wt.%) as a surrogate for pure Sn. The cyclic DRX mechanism and, in particular, whether long whiskers or hillocks were formed, was validated by comparing the empirical data against the three hierarchal requirements: (1) DRX to occur at all: εc = A D o m Z n , (2) DRX to be cyclic: D o < 2D r, and (3) Grain boundary pinning (thin films): h versus d. Continuous DRX took place in the 2.0-μm and 4.9-μm films that resulted in short stubby whiskers. Depleted zones, which resulted solely from a tensile stress-driven diffusion mechanism, confirmed the pervasiveness of long-range diffusion so that it did not control whisker or hillock formation other than a small loss of activity by reduced thermal activation at lower temperatures. Furthermore, a first-principles DRX model paves the way to develop like mitigation strategies against long whisker growth.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

A unified creep plasticity damage (UCPD) model for eutectic Sn-Pb and Pb-free solders was developed and implemented into finite element analysis codes. The new model will be described along with the relationship between the model's damage evolution equation and an empirical Coffin-Manson relationship for solder fatigue. Next, developments needed to model crack initiation and growth in solder joints will be described. Finally, experimentally observed cracks in typical solder joints subjected to thermal mechanical fatigue are compared with model predictions. Finite element based modeling is particularly suited for predicting solder joint fatigue of advanced electronics packaging, e.g. package-on-package (PoP), because it allows for evaluation of a variety of package materials and geometries.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Direct Digital Manufacturing techniques such as laser ablation are proposed for the fabrication of lower cost, miniaturized, and lightweight integrated assemblies with high performance requirements. This paper investigates the laser ablation of a Ti/Cu/Pt/Au thin film metal stack on fired low temperature cofired ceramic (LTCC) surfaces using a 355 nm Nd.YAG diode pumped laser ablation system. It further investigates laser ablation applications using unfil ed, or 'green', LTCC materials: (1) through one layer of a laminated stack of unfiled LTCC tape to a buried thick film conductor ground plane, and (2) in unfiled Au thick films. The UV laser power profile and part fixturing were optimized to address defects such as LTCC microcracking, thin film adhesion failures, and redeposition of Cu and Pt. An alternate design approach to minimize ablation time was tested for efficiency in manufacture. Multichip Modules (MCM) were tested for solder ability', solder leach resistance, and wire bondabilify. Scanning election microscopy (SEM) as well as cross sections and microanalytical techniques were used in this study.

A unified creep plasticity damage (UCPD) model for Sn-Pb and Pb-free solders was developed and implemented into finite element analysis codes. The new model will be described along with the relationship between the model's damage evolution equation and an empirical Coffin-Manson relationship for solder fatigue. Next, developments needed to model crack initiation and growth in solder joints will be described. Finally, experimentally observed cracks in typical solder joints subjected to thermal mechanical fatigue are compared with model predictions. Finite element based modeling is particularly suited for predicting solder joint fatigue of advanced electronics packaging, e.g. package-on-package (PoP), because it allows for evaluation of a variety of package materials and geometries. Copyright © 2013 by ASME.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

The development of Pb-free solutions for the highreliability electronics community necessitates the consideration of hybrid microcircuit (HMC) products. This study used a test vehicle that included both plastic and ceramic packages as well as leaded and area-array solder joints on an alumina substrate. The conductor was a Ag-Pd thick film layer. The shear strength was measured for interconnections made with 63Sn-37Pb (wt.%, abbreviated Sn-Pb) and 95.5Sn-3.0Ag-0.5Cu (Sn-Ag-Cu) solders as a function of isothermal aging, thermal cycling, and thermal shock environments. The area-array packages indicated that solder joint fatigue was not altered significantly in a forward compatibility situation (i.e., Sn-Pb balls and a Sn-Ag-Cu assembly process). Local CTE mismatch fatigue strains are important for solder joints connecting ceramic area array packages to ceramic substrates. The gull-wing lead, SOT plastic package solder joints assembled with the Sn-Ag-Cu solder exhibit a greater strength loss under temperature cycling than did the corresponding Sn-Pb interconnections. Thermal shock is more detrimental to Sn-Pb HMC solder joints than are the equivalent number of thermal cycles. Copyright 2012 ASM International® All rights reserved.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

The development and operational sustainment of renewable (geothermal) and non-renewable (fossil fuel) energy resources will be accompanied by increasingly higher costs factors: exploration and site preparation, operational maintenance and repair. Increased government oversight in the wake of the Gulf oil spill will only add to the cost burden. It is important to understand that downhole conditions are not just about elevated temperatures. It is often construed that military electronics are exposed to the upper limit in terms of extreme service environments. Probably the harshest of all service conditions for electronics and electrical equipment are those in oil, gas, and geothermal wells. From the technology perspective, advanced materials, sensors, and microelectronics devices are benefificial to the exploration and sustainment of energy resources, especially in terms of lower costs. Besides the need for the science that creates these breakthroughs - there is also a need for sustained engineering development and testing. Downhole oil, gas, and geothermal well applications can have a wide range of environments and reliability requirements: Temperature, Pressure, Vibration, Corrosion, and Service duration. All too frequently, these conditions are not well-defifined because the application is labeled as 'high temperature'. This ambiguity is problematic when the investigation turns to new approaches for electronic packaging solutions. The objective is to develop harsh environment, electronic packaging that meets customer requirements of cost, performance, and reliability. There are a number of challenges: (1) Materials sets - solder alloys, substrate materials; (2) Manufacturing process - low to middle volumes, low defect counts, new equipment technologies; and (3) Reliability testing - requirements documents, test methods and modeling, relevant standards documents. The cost to develop and sustain renewable and non-renewable energy resources will continue to escalate within the industry. Downhole electronics can provide a very cost-effective approach for well exploration and sustainment (data logging). However, the harsh environments are a 'game-changer' in terms defining materials, assembly processes and the long-term reliability of downhole electronic systems. The system-level approach will enable the integration of each of these contributors - materials, processes, and reliability - in order to deliver cost-effective electronics that meet customer requirements.

Abstract not provided.

A unified creep plasticity damage (UCPD) model for Sn-Pb and Pb-free solders was developed and implemented into finite element analysis codes. The new model will be described along with the relationship between the model's damage evolution equation and an empirical Coffin-Manson relationship for solder fatigue. Next, two significant developments were needed to model crack initiation and growth in solder joints. First, an ability to accelerate the simulations such that the effects of hundreds or thousands of thermal cycles could be modeled in a reasonable amount of time was needed. This was accomplished by applying a user prescribed acceleration factor to the damage evolution; then, damage generated by an acceleration factor of cycles could be captured by the numerical simulation of a single thermal cycle. Second, an ability to capture the geometric effects of crack initiation and growth was needed. This was accomplished by replacing material in finite elements that had met the cracking failure criterion with very flexible elastic material. This diffuse crack modeling approach with local finite elements is known to generate mesh dependent solutions. However, introduction of an element size dependent term into the damage evolution equation was found to be effective in controlling mesh dependency. Finally, experimentally observed cracks in a typical solder joint subjected to thermal mechanical fatigue are compared with model predictions. Copyright © 2011 by ASME.

A unified creep plasticity damage (UCPD) model for Sn-Pb and Pb-free solders was developed and implemented into finite element analysis codes. The new model will be described along with the relationship between the model's damage evolution equation and an empirical Coffin-Manson relationship for solder fatigue. Next, two significant developments were needed to model crack initiation and growth in solder joints. First, an ability to accelerate the simulations such that the effects of hundreds or thousands of thermal cycles could be modeled in a reasonable amount of time was needed. This was accomplished by applying a user prescribed acceleration factor to the damage evolution; then, damage generated by an acceleration factor of cycles could be captured by the numerical simulation of a single thermal cycle. Second, an ability to capture the geometric effects of crack initiation and growth was needed. This was accomplished by replacing material in finite elements that had met the cracking failure criterion with very flexible elastic material. This diffuse crack modeling approach with local finite elements is known to generate mesh dependent solutions. However, introduction of an element size dependent term into the damage evolution equation was found to be effective in controlling mesh dependency. Finally, experimentally observed cracks in a typical solder joint subjected to thermal mechanical fatigue are compared with model predictions. Copyright © 2011 by ASME.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

A unified creep plasticity damage (UCPD) model for Sn-Pb solder is developed in this paper. Stephens and Frear (1999) studied the creep behavior of near-eutectic 60Sn-40Pb solder subjected to low strain rates and found that the inelastic (creep and plastic) strain rate could be accurately described using a hyperbolic Sine function of the applied effective stress. A recently developed high-rate servo-hydraulic method was employed to characterize the temperature and strain-rate dependent stress-strain behavior of eutectic Sn-Pb solder over a wide range of strain rates (10{sup -4} to 10{sup 2} per second). The steady state inelastic strain rate data from these latest experiments were also accurately captured by the hyperbolic Sine equation developed by Stephens and Frear. Thus, this equation was used as the basis for the UCPD model for Sn-Pb solder developed in this paper. Stephens, J.J., and Frear, D.R., Metallurgical and Materials Transactions A, Volume 30A, pp. 1301-1313, May 1999.

Abstract not provided.

Legislated requirements and industry standards are replacing eutectic lead-tin (Pb-Sn) solders with lead-free (Pb-free) solders in future component designs and in replacements and retrofits. Since Pb-free solders have not yet seen service for long periods, their long-term behavior is poorly characterized. Because understanding the reliability of Pb-free solders is critical to supporting the next generation of circuit board designs, it is imperative that we develop, validate and exercise a solder lifetime model that can capture the thermomechanical response of Pb-free solder joints in stockpile components. To this end, an ASC Level 2 milestone was identified for fiscal year 2010: Milestone 3605: Utilize experimentally validated constitutive model for lead-free solder to simulate aging and reliability of solder joints in stockpile components. This report documents the completion of this milestone, including evidence that the milestone completion criteria were met and a summary of the milestone Program Review.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

New Pb-free alloys that are variations of the Sn-Ag-Cu (SAC) ternary system, having reduced Ag content, are being developed to address the poor shock load survivability of current SAC305, SAC396, and SAC405 compositions. However, the thermal mechanical fatigue properties must be determined for the new alloys in order to develop constitutive models for predicting solder joint fatigue. A long-term study was initiated to investigate the time-independent (stress-strain) and time-dependent (creep) deformation properties of the alloy 98.5Sn-1.0Ag-0.5Cu (wt.% SAC105). The compression stress-strain properties, which are reported herein, were obtained for the solder in as-cast and aged conditions. The test temperatures were -25°C, 25°C, 75°C, 125°C, and 160°C and the strain rates were 4.2 × 10 -5 s -1 and 8.3 × 10 -4s -1. The SAC105 performance was compared with that of the 95.5Sn-3.9Ag-0.6Cu (SAC396) solder. Like the SAC396 solder, the SAC105 microstructure exhibited only small microstructural changes after deformation. The stress-strain curves showed work-hardening behavior that diminished with increased temperature to a degree that indicated dynamic recrystallization activity. The aging treatment had a small effect on the stress-strain curves, increasing the degree of work hardening. The yield stresses of SAC105 were significantly less than those of SAC396. The aging treatment caused a small drop in yield stress, as is observed with the SAC396 material. The static modulus values of SAC105 were lower than those of SAC396 and exhibited both temperature and aging treatment dependencies that differed from those of the SAC396 material. These trends clearly show that the stress-strain behavior of Sn-Ag-Cu solders is sensitive to the specific, individual composition. © 2009 U.S. Department of Energy.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

The American Welding Society (AWS) standards and specifications plays an important role in qualification of solders and soldering procedures. AWS first approved document in 2008 addresses specifically soldering technology. That document is titled AWS B2.3/B2.3M:2008, Specification for Soldering Procedure and Performance Qualification. This specification provides the requirements for qualification of soldering procedure specifications, solderers, and soldering operators for manual, mechanized, and automatic soldering. AWS B2.3 also lists inorganic acid fluxes according to the applicable base material. The document consists two sections titled, 'Soldering Procedure Qualification' and 'Soldering Performance Qualification.' The first section establishes the specimen geometry, fabrication procedures, and solder joint test and evaluation data. The second title addresses the ability of a solderer, a person who performs the manual soldering process, or the soldering operator.

Abstract not provided.

The assembly of the BDYE detector requires the attachment of sixteen silicon (Si) processor dice (eight on the top side; eight on the bottom side) onto a low-temperature, co-fired ceramic (LTCC) substrate using 63Sn-37Pb (wt.%, Sn-Pb) in a double-reflow soldering process (nitrogen). There are 132 solder joints per die. The bond pads were gold-platinum-palladium (71Au-26Pt-3Pd, wt.%) thick film layers fired onto the LTCC in a post-process sequence. The pull strength and failure modes provided the quality metrics for the Sn-Pb solder joints. Pull strengths were measured in both the as-fabricated condition and after exposure to thermal cycling (-55/125 C; 15 min hold times; 20 cycles). Extremely low pull strengths--referred to as the low pull strength phenomenon--were observed intermittently throughout the product build, resulting in added program costs, schedule delays, and a long-term reliability concern for the detector. There was no statistically significant correlation between the low pull strength phenomenon and (1) the LTCC 'sub-floor' lot; (2) grit blasting the LTCC surfaces prior to the post-process steps; (3) the post-process parameters; (4) the conductor pad height (thickness); (5) the dice soldering assembly sequence; or (5) the dice pull test sequence. Formation of an intermetallic compound (IMC)/LTCC interface caused by thick film consumption during either the soldering process or by solid-state IMC formation was not directly responsible for the low-strength phenomenon. Metallographic cross sections of solder joints from dice that exhibited the low pull strength behavior, revealed the presence of a reaction layer resulting from an interaction between Sn from the molten Sn-Pb and the glassy phase at the TKN/LTCC interface. The thick film porosity did not contribute, explicitly, to the occurrence of reaction layer. Rather, the process of printing the very thin conductor pads was too sensitive to minor thixotropic changes to ink, which resulted in inconsistent proportions of metal and glassy phase particles present during the subsequent firing process. The consequences were subtle, intermittent changes to the thick film microstructure that gave rise to the reaction layer and, thus, the low pull strength phenomenon. A mitigation strategy would be the use of physical vapor deposition (PVD) techniques to create thin film bond pads; this is multi-chip module, deposited (MCM-D) technology.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Environmental legislation related to lead-free soldering technology that have been imposed in several nations are requiring manufacturers to consider several technical and business issues to effectively use the lead-free soldering technology. Several researches for reflow/furnace soldering have focused on tin-silver-copper compositions, commonly referred to as the SAC alloys. These alloys exhibit similar processing performance but presents both solderability and temperature sensitivity issues. The SAC396 alloy has been recommended as a standard replacement for tin/lead solders by the International Electronics Manufacturing Initiative. Long-term reliability is also a primary concern associated with the adaptation of lead-free solder alloys for critical applications. The international soldering community is continuously working to meet the technical challenges of implementing a lead-free soldering technology into consumer and high-reliability electronics.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

The solderability of an immersion Ag finish was evaluated after the exposure of test specimens to a Battelle Class II environment, which accelerates the storage conditions of light industrial surroundings. The solderability metric was the contact angle, (θC), as determined by the meniscometer/wetting balance technique. Auger surface and depth profile analyses were utilized to identify changes in the coating chemistry. The solderability test results indicate that there was no appreciable loss in solderability when the immersion Ag coated coupons were packaged in vapor phase corrosion (VPC) inhibitor bags and/or inhibitor bags with VPC inhibitor paper and aged for 8 hours, 1 week or 2 weeks in the Battelle Class II environment. An increase in surface carbon concentration after aging did not appear to significantly affect solderability. Copyright © 2006 ASM International®.

Abstract not provided.

Abstract not provided.

Abstract not provided.

The SA1358-10 and SA2052-4 circular JT Type plug connectors are used on a number of nuclear weapons and Joint Test Assembly (JTA) systems. Prototype units were evaluated for the following specific defects associated with the 95Sn-5Sb (Sn-Sb, wt.%) solder joint used to attach the beryllium-copper (BeCu) spring fingers to the aluminum (Al) connector shell: (1) extended cracking within the fillet; (2) remelting of the solder joint during the follow-on, soldering step that attached the EMR adapter ring to the connector shell (and/or soldering the EMR shell to the adapter ring) that used the lower melting temperature 63Sn-37Pb (Sn-Pb) alloy; and (3) spalling of the Cd (Cr) layer overplating layer from the fillet surface. Several pedigrees of connectors were evaluated, which represented older fielded units as well as those assemblies that were recently constructed at Kansas City Plant. The solder joints were evaluated that were in place on connectors made with the current soldering process as well as an alternative induction soldering process for attaching the EMR adapter ring to the shell. Very similar observations were made, which crossed the different pedigrees of parts and processes. The extent of cracking in the top side fillets varied between the different connector samples and likely the EMR adapter ring to the shell. Very similar observations were made, which crossed the different pedigrees of parts and processes. The extent of cracking in the top side fillets varied between the different connector samples and likely reflected the different extents to which the connector was mated to its counterpart assembly. In all cases, the spring finger solder joints on the SA1358-10 connectors were remelted as a result of the subsequent EMR adapter ring attachment process. Spalling of the Cd (Cr) overplating layer was also observed for these connectors, which was a consequence of the remelting activity. On the other hand, the SA2052-4 connector did not exhibit evidence of remelting of the spring finger solder joint. The Cd (Cr) layer did not show signs of spalling. These results suggested that, due to the size of the SA1358-10 connector, any of the former or current soldering processes used to attach the EMR adapter ring and/or EMR shell to the connector shell, requires a level of heat energy that will always result in the remelting of the spring finger solder joint attached with either the Sn-Ag or the Sn-Sb alloy. Lastly, it was construed that the induction soldering process, which is used to attach the EMR adapter ring onto the shell, was more likely to have caused the remelting event rather than the more localized heat source of the hand soldering iron used to attach the EMR shell to the adapter ring.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Cadmium plating on metal surfaces is commonly used for corrosion protection and to achieve good solderability on the 304L stainless steel shell of the MC4636 lightning arrestor connector (LAC) for the W76-1 system. This study examined the use of zinc as a potential substitute for the cadmium protective surface finish. Tests were performed with an R and RMA flux and test temperatures of 230 C, 245 C, and 260 C. Contact angle, {theta}{sub c}, served as the generalized solderability metric. The wetting rate and wetting time parameters were also collected. The solderability ({theta}{sub c}) of the Erie Plating Cd/Ni coatings was better than that of similar Amphenol coatings. Although the {theta}{sub c} data indicated that both Cd/Ni platings would provide adequate solderability, the wetting rate and wetting time data showed the Amphenol coatings to have better performance. The Zn/Ni coatings exhibited non-wetting under all flux and temperature conditions. Based on the results of these tests, it has been demonstrated that zinc plating is not a viable alternate to cadmium plating for the LAC connectors.

Low temperature, Sn-based Pb-free solders were developed by making alloy additions to the starting material, 96.5Sn-3.5Ag (mass%). The melting behavior was determined using Differential Scanning Calorimetry (DSC). The solder microstructure was evaluated by optical microscopy and electron probe microanalysis (EPMA). Shear strength measurements, hardness tests, intermetallic compound (IMC) layer growth measurements, and solderability tests were performed on selected alloys. Three promising ternary alloy compositions and respective solidus temperatures were: 91.84Sn-3.33Ag-4.83Bi, 212 C; 87.5Sn-7.5Au-5.0Bi, 200 C; and 86.4Sn-5.1 Ag-8.5Au, 205 C. A quaternary alloy had the composition 86.8Sn-3.2Ag-5.0Bi-5.0Au and solidus temperature of 194 C The shear strength of this quaternary alloy was nearly twice that of the eutectic Sn-Pb solder. The 66Sn-5.0Ag-10Bi-5.0Au-101n-4.0Cu alloy had a solidus temperature of 178 C and good solderability on Cu. The lowest solidus temperature of 159 C was realized with the alloy 62Sn-5.0Ag-10Bi-4.0Au-101n-4.0Cu-5.0Ga. The contributing factor towards the melting point depression was the composition of the solid solution, Sn-based matrix phase of each solder.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Abstract not provided.

Legislative and marketing forces both abroad and in the US are causing the electronics industry to consider the use of Pb-free solders in place of traditional Sn-Pb alloys. Previous case studies have demonstrated the satisfactory manufacturability and reliability of several Pb-free compositions for printed circuit board applications. Those data, together with the results of fundamental studies on Pb-free solder materials, have indicated the general feasibility of their use in the broader range of present-day, electrical and electronic components.

Abstract not provided.

The main objective of this project was to develop reliable, low-cost techniques for joining silicon nitride (Si{sub 3}N{sub 4}) to itself and to metals. For Si{sub 3}N{sub 4} to be widely used in advanced turbomachinery applications, joining techniques must be developed that are reliable, cost-effective, and manufacturable. This project addressed those needs by developing and testing two Si{sub 3}N{sub 4} joining systems; oxynitride glass joining materials and high temperature braze alloys. Extensive measurements were also made of the mechanical properties and oxidation resistance of the braze materials. Finite element models were used to predict the magnitudes and positions of the stresses in the ceramic regions of ceramic-to-metal joints sleeve and butt joints, similar to the geometries used for stator assemblies.

Electronic components and micro-sensors utilize ceramic substrates, copper and aluminum interconnect and silicon. The joining of these combinations require pre-metallization such that solders with fluxes can wet such combinations of metals and ceramics. The paper will present a new solder alloy that can bond metals, ceramics and composites. The alloy directly wets and bonds in air without the use flux or premetallized layers. The paper will present typical processing steps and joint microstructures in copper, aluminum, aluminum oxide, aluminum nitride, and silicon joints.

Minimizing the likelihood of solder joint embrittlement in connectors is realized by reducing or eliminating retained Au plating and/or Au-Sn intermetallic compound formation from the assemblies. Gold removal is performed most effectively by using a double wicking process. When only a single wicking procedure can be used, a higher soldering temperature improves the process of Au removal from the connector surfaces and to a nominal extent, removal of Au-contaminated solder from the joint. A longer soldering time did not appear to offer any appreciable improvement toward removing the Au-contaminated solder from the joint. Because the wicking procedure was a manual process, it was operator dependent.

An assessment was made of the manufacturability of hybrid microcircuit test vehicles assembled using three Pb-free solder compositions 96.5Sn--3.5Ag (wt.%), 91.84Sn--3.33Ag--4.83Bi, and 86.85Sn--3.15Ag--5.0Bi--5.0Au. The test vehicle substrate was 96% alumina; the thick film conductor composition was 76Au--21Pt--3Pd. Excellent registration between the LCCC or chip capacitor packages and the thick film solder pads was observed. Reduced wetting of bare (Au-coated) LCCC castellations was eliminated by hot solder dipping the I/Os prior to assembly of the circuit card. The Pb-free solders were slightly more susceptible to void formation, but not to a degree that would significantly impact joint functionality. Microstructural damage, while noted in the Sn-Pb solder joints, was not observed in the Pb-free interconnects.

Microstructural evolution due to aging of solder alloys determines their long-term reliability as electrical, mechanical and thermal interconnects in electronics packages. The ability to accurately determine the reliability of existing electronic components as well as to predict the performance of proposed designs depends upon the development of reliable material models. A kinetic Monte Carlo simulation was used to simulate microstructural evolution in solder-class materials. The grain growth model simulated many of the microstructural features observed experimentally in 63Sn-37Pb, a popular near-eutectic solder alloy. The model was validated by comparing simulation results to new experimental data on coarsening of Sn-Pb solder. The computational and experimental grain growth exponent for two-phase solder was found to be much lower than that for normal, single phase grain growth. The grain size distributions of solders obtained from simulations were narrower than that of normal grain growth. It was found that the phase composition of solder is important in determining grain growth behavior.

Corrosion is an important consideration in the design of a solder joint. In the case of a conduit, corrosion from both the outside service environment and the medium being transported within the pipe or tube must be addressed. Solder joints are susceptible to atmospheric corrosion, galvanic corrosion, voltage-assisted corrosion, stress corrosion cracking, and corrosion fatigue cracking. Galvanic corrosion is of particular concern, given the fact that solder joints are comprised of different metals or alloys in contact with one another.

Soldering provides a cost-effective means for attaching electronic packages to circuit boards using both small scale and large scale manufacturing processes. Soldering processes accommodate through-hole leaded components as well as surface mount packages, including the newer area array packages such as the Ball Grid Arrays (BGA), Chip Scale Packages (CSP), and Flip Chip Technology. The versatility of soldering is attributed to the variety of available solder alloy compositions, substrate material methodologies, and different manufacturing processes. For example, low melting temperature solders are used with temperature sensitive materials and components. On the other hand, higher melting temperature solders provide reliable interconnects for electronics used in high temperature service. Automated soldering techniques can support large-volume manufacturing processes, while providing high reliability electronic products at a reasonable cost.

An evaluation was performed which examined the aging of surface mount solder joints assembled with 91.84Sn-3.33Ag-4.83Bi solder. Defect analysis of the as-fabricated test vehicles revealed excellent solderability, good package alignment, and a minimum number of voids. Continuous DC electrical monitoring of the solder joints did not reveal opens during as many as 10,000 thermal cycles (0 C, 100 C). The solder joints exhibited no significant degradation through 2500 cycles, based upon an absence of microstructural damage and sustained shear and pull strengths of chip capacitors and J-leaded solder joints, respectively. Thermal cycles of 5000 and 10,000 resulted in some surface cracking of the solder fillets and coatings. In a few cases, deeper cracks were observed in the thinner reaches of several solder fillets. There was no deformation or cracking in the solder located in the gap between the package I/O and the circuit board pad nor in the interior of the fillets, both locations that would raise concerns of joint mechanical integrity. A drop in the chip capacitor shear strength was attributed to crack growth near the top of the fillet.

Aging analyses were performed on solder joints from two radar units: (1) a laboratory, N57 tube-type radar unit and (2) a field-returned, B61-0, tube-type radar unit. The cumulative temperature environments experienced by the units during aging were calculated from the intermetallic compound layer thickness and the mean Pb-rich phase particle size metrics for solder joints in the units, assuming an aging time of 35 years for both radars. Baseline aging metrics were obtained from a laboratory test vehicle assembled at AS/FM and T; the aging kinetics of both metrics were calculated from isothermal aging experiments. The N57 radar unit interconnect board solder joints exhibited very little aging. The eyelet solder joints did show cracking that most likely occurred at the time of assembly. The eyelet, SA1126 connector solder joints, showed some delamination between the Cu pad and underlying laminate. The B61 field-returned radar solder joints showed a nominal degree of aging. Cracking of the eyelet solder joints was observed. The Pb-rich phase particle measurements indicated additional aging of the interconnects as a result of residual stresses. Cracking of the terminal pole connector, pin-to-pin solder joint was observed; but it was not believed to jeopardize the electrical functionality of the interconnect. Extending the stockpile lifetime of the B61 tube-type radar by an additional 20 years would not be impacted by the reliability of the solder joints with respect to further growth of the intermetallic compound layer. Additional coarsening of the Pb-rich phase will increase the joints' sensitivity to thermomechanical fatigue.

There are two sources of contamination in solder alloys. The first source is trace elements from the primary metals used in the as-manufactured product, be that product in ingot, wire, or powder form. Their levels in the primary metal are determined by the refining process. While some of these trace elements are naturally occurring materials, additional contamination can result from the refining and/or forming processes. Sources include: furnace pot liners, debris on the cutting edges of shears, rolling mill rollers, etc. The types and levels of contaminants per solder alloy are set by recognized industrial, federal, military, and international specifications. For example, the 63Sn-37Pb solder purchased to the ASTM B 32 standard can have maximum levels of contamination for the following metals: 0.08(wt.)%Cu, 0.001 %Cd, 0.005%Al, 0.25%Bi, 0.03%As, 0.02%Fe, and 0.005 %Zn. A second cause of contamination in solders, and solder baths in particular, is their actual use in soldering operations. Each time a workpiece is introduced into the bath, some dissolution of the joint base metal(s), protective or solderable coatings, and fixture metal takes place which adds to contamination levels in the solder. The potential impurities include Cu; Ni; Au or other noble metals used as protective finishes and Al; Fe; and Zn to name a few. Even dissolution of the pot wall or liner is a source of impurities, typically Fe.

An expression for the coarsening rate of the Pb-rich phase particles was determined through isothermal aging experiments and comparative literature data as: λ = λo+{[4.10×10-5 e-11023/T+15.6×10-8 e-3123/T (dγ/dt)]t}0.256 where γo and γ are the initial and final mean Pb-rich particle diameters, respectively (mm); T is temperature (°K); t is time (s); and dγ/dt is the strain rate (s-1). The phase coarsening behavior showed good agreement with previous literature data from isothermal aging experiments. The power-law exponent, p, for the Pb-rich phase size coarsening kinetics: γp-γop≈t increased from a value of 3.3 at the low aging temperature regime (70-100 °C) to a value of 5.1 at the high temperature regime (135-170 °C), suggesting that the number of short-circuit diffusion paths had increased with further aging. This expression provides an important basis for the microstructurally-based, constitutive equation used in the visco-plastic model for TMF in Sn-Pb solder. The revised visco-plastic model was exercised using a through-hole solder joint configuration. Initial data indicate a satisfactory compatibility between the coarsening expression and the constitutive equations.

A overview has been presented on the topic of alternative surface finishes for package I/Os and circuit board features. Aspects of processability and solder joint reliability were described for the following coatings: baseline hot-dipped, plated, and plated-and-fused 100Sn and Sn-Pb coatings; Ni/Au; Pd, Ni/Pd, and Ni/Pd/Au finishes; and the recently marketed immersion Ag coatings. The Ni/Au coatings appear to provide the all-around best option in terms of solderability protection and wire bondability. Nickel/Pal ftishes offer a slightly reduced level of performance in these areas that is most likely due to variable Pd surface conditions. It is necessmy to minimize dissolved Au or Pd contents in the solder material to prevent solder joint embrittlement. Ancillary aspects that included thickness measurement techniques; the importance of finish compatibility with conformal coatings and conductive adhesives; and the need for alternative finishes for the processing of non-Pb bearing solders were discussed.

The 91.84Sn-3.33Ag-4.83Bi and 96.5Sn-3.5Ag Pb-free solders were evaluated for surface mount circuit board interconnects. The 63Sn-37Pb solder provided the baseline data. All three solders exhibited suitable manufacturability per a defect analyses of circuit board test vehicles. Thermal cycling had no significant effect on the 91.84Sn-3.33Ag-4.83Bi solder joints. Some degradation in the form of grain boundary sliding was observed in 96.5Sn-3.5Ag and 63Sn-37Pb solder joints. The quality of the solder joint microstructures showed a slight degree of degradation under thermal shock exposure for all of the solders tested. Trends in the solder joint shear strengths could be traced to the presence of Pd in the solder, the source of which was the Pd/Ni finish on the circuit board conductor features. The higher, intrinsic strengths of the Pb-free solders encouraged the failure path to be located in proximity to the solder/substrate interface where Pd combined with Sn to form brittle PdSn{sub 4} particles, resulting in reduced shear strengths.

A mathematical model was developed to quantitatively describe the intermetallic compound (IMC) layer growth that takes place between a Sn-based solder and a noble metal thick film conductor material used in hybrid microcircuit (HMC) assemblies. The model combined the reaction kinetics of the solder/substrate interaction, as determined from ancillary isothermal aging experiments, with a 2-D finite element mesh that took account of the porous morphology of the thick film coating. The effect of the porous morphology on the IMC layer growth when compared to the traditional 1-D computations was significant. The previous 1-D calculations under-predicted the nominal IMC layer thickness relative to the 2-D case. The 2-D model showed greater substrate consumption by IMC growth and lesser solder consumption that was determined with the 1-D computation. The new 2-D model allows the design engineer to better predict circuit aging and hence, the reliability of HMC hardware that is placed in the field.

The B61 accelerated aging unit (AAU) provided a unique opportunity to document the effects of a controlled, long-term thermal cycling environment on the aging of materials used in the device. This experiment was of particular interest to solder technologists because thermal cycling environments are a predominant source of solder joint failures in electronic assemblies. Observations of through hole solder joints in the MC2918 Firing Set from the B61 AAU did not reveal signs of catastrophic failure. Quantitative analyses of the microstructural metrics of intermetallic compound layer thickness and Pb-rich phase particle distributions indicated solder joint aging that was commensurate with the accelerated aging environment. The effects of stress-enhanced coarsening of the Pb-rich phase were also documented.

A test procedure was developed to assess the capillary flow wettability of solders inside a confined geometry. The test geometry comprised two parallel plates with a controlled gap of constant thickness (0.008 cm, 0.018 cm, 0.025 cm and 0.038 cm). Capillary flow was assessed by: (1) the meniscus or capillary rise of the solder within the gap; (2) the extent of void formation in the gap; and (3) the time dependence of the risen solder film. Tests were performed with the lead-free solders 95Sn-5Sb, 96.5Sn-3.5Ag, and 91.84Sn-3.33Ag-4.83Bi. The capillary rise of the lead-free solders was less than that observed with the 63Sn-37Pb control. Reducing the solder surface tension and contact angle improved capillary flow. Void formation by the non lead solders increased as the gap became smaller. The extent of voiding was determined primarily by the gap size rather than the wettability parameters (contact angle or surface tension) of the individual alloys. © 1997, MCB UP Limited

MC1814 Interconnection Boxes from dismantled B57 bombs, and MC2839 firing Sets from retired W70-1 warheads were obtained from the Pantex facility. Printed circuit boards were selected from these components for microstructural analysis of their solder joints. The analysis included a qualitative examination of the solder joints and quantitative assessments of (1) the thickness of the intermetallic compound layer that formed between the solder and circuit board Cu features, and (2) the Pb-rich phase particle distribution within the solder joint microstructure. The MC2839 solder joints had very good workmanship qualities. The intermetallic compound layer stoichiometry was determined to be that of Cu6Sn5. The mean intermetallic compound layer thickness for all solder joints was 0.885 mm. The magnitude of these values did not indicate significant growth over the weapon lifetime. The size distribution of the Pb-rich phase particles for each of the joints were represented by the mean of 9.85 {times} 10{sup {minus}6} mm{sup 2}. Assuming a spherical geometry, the mean particle diameter would be 3.54 mm. The joint-to-joint difference of intermetallic compound layer thickness and Pb-rich particle size distribution was not caused by varying thermal environments, but rather, was a result of natural variations in the joint microstructure that probably existed at the time of manufacture. The microstructural evaluation of the through-hole solder joints form the MC2839 and MC1814 components indicated that the environmental conditions to which these electronic units were exposed in the stockpile, were benign regarding solder joint aging. There was an absence of thermal fatigue damage in MC2839 circuit board, through-hole solder joints. The damage to the eyelet solder joints of the MC1814 more likely represented infant mortality failures at or very near the time of manufacture, resulting from a marginal design status of this type of solder joint design.

An experimental program was performed that examined the physical and mechanical properties of several candidate, lead (Pb)-free solder alloys. The project was separated into three tasks designated as follows: (1) Alloy Development, (2) Intermetallic Compound (IMC) Growth, and (3) Mechanical Testing. Task 1, Alloy Development, examined the impact that small Pb additions had on the physical and mechanical properties of several Pb-free solders. Task 2, Intermetallic Compound (IMC) Growth investigated the development of the IMC layer between several Pb-free solder alloys and Cu. Quantitative analyses established the kinetics of layer growth in the solid state as a result of elevated temperature aging treatments, and as a function of the composition of the solder. Liquid state IMC layer growth as well as dissolution rates of Cu substrates by molten solders were quantitatively documented. Task 3, Mechanical Properties, performed a series of experiments that provided fracture toughness measurement, thermomechanical fatigue evaluations, and creep deformation data on a number of the Pb-free solders as well as on Pb-free alloys that had been contaminated with controlled quantities of Pb additions. The data obtained from these tests results relative performance information as well as valuable input data for computer models. Several ancillary tests were also performed to support partner company efforts.

The suitability of various metallic printed wiring board surface finishes was assessed for new technology applications that incorporate assembly with Lead-free solders. The manufacture of a lead-free product necessitates elimination of lead (Pb) from the solder, the circuit board as well as the component lead termination. It is critical however for the selected interconnect Pb-free solder and the corresponding printed wiring board (PWB) and component lead finishes to be mutually compatible. Baseline compatibility of select Pb-free solders with Pb containing PWB surface finish and components was assessed. This was followed by examining the compatibility of the commercially available CASTIN{trademark} (SnAgCuSb) Pb-free solder with a series of PWB metallic finishes: Ni/Au, Ni/Pd, and Pd/Cu. The compatibility was assessed with respect to assembly performance, solder joint integrity and long term attachment reliability. Solder joint integrity and mechanical behavior of representative 50 mil pitch 20I/O SOICs was determined before and after thermal stress. Mechanical pull test studies demonstrated that the strength of SnAgCuSb solder interconnections is notably greater than that of SnPb interconnections.

Enhanced performance goals and environmental restrictions have heightened the consideration for use of alternative solders as replacements for the traditional tin-lead (Sn-Pb) eutectic and near-eutectic alloys. However, the implementation of non-Pb bearing surface finishes may lag behind solder alloy development. A study was performed which examined the effect(s) of Pb contamination on the performance of Sn-Ag-Bi and Sn-Ag-Cu-Sb lead-free solders by the controlled addition of 63Sn-37Pb solder at levels of 0.5 {minus} 8.0 wt.%. Thermal analysis and ring-in-plug shear strength studies were conducted on bulk solder properties. Circuit board prototype studies centered on the performance of 20I/O SOIC gull wing joints. Both alloys exhibited declines in their melting temperatures with greater Sn-Pb additions. The ring-in-plug shear strength of the Sn-Ag-Cu-Sb solder increased slightly with Sn-Pb levels while the Sn-Ag-Bi alloy experienced a strength loss. The mechanical behavior of the SOIC (Small Outline Integrated Circuit) Sn-Ag-Bi solder joints reproduced the strength levels were insensitive to 10,106 thermal cycles. The Sn-Ag-Cu-Sb solder showed a slight decrease in the gull wing joint strengths that was sensitive to the Pb content of the surface finish.

Recent trends towards finer pitch devices and assembly with lead free solders have resulted in increased interest in NiPd plated component leads by the electronics industry. This paper discusses the performance of NiPd fine pitch components as determined by wettability, assembly performance and solder joint reliability. Assembly evaluations were performed with a lead free solder as well as with eutectic SnPb solder. The compatibility of the NiPd component leads with different circuit board finishes (metallic and organic azole) will also be discussed.

Prototype circuit board test vehicles wee assembled with three candidate lead-free solders: 96.5Sn-3.5Ag (wt %), 58Bi-42Sn, and 91.84Sn-3.33 Ag 83Bi., using a forced-convection/infrared furnace and RMA flux based pastes. Wettability of circuit board features and packages was best with Sn-Ag-Bi alloy followed in order by Bi-Sn and Sn-Ag solders. The Sn-Ag-Bi solder had a greater propensity for void formation in the joints. The reliability assessment was based upon solder joint microstructure and the shear strength of selected leadless packages. Solder joint damage was of a greater extent after thermal shock exposures rather than thermal cycling. The Sn-Ag-Bi alloy on the largest package appeared most susceptible to thermal shock. Test vehicle performance clearly demonstrated that, with the non-lead solders, local thermal expansion mismatch can be as detrimental to joint integrity as the traditional global mismatch damage.

The manufacturing feasibility and attachment reliability of a series of newly developed lead-free solders were investigated for wave soldering applications. Some of the key assembly aspects addressed included: wettability as a function of board surface finish, flux activation and surface tension of the molten solder, solder joint fillet quality and optimization of soldering thermal profiles. Generally, all new solder formulations exhibited adequate wave soldering performance and can be considered as possible alternatives to eutectic SnPb for wave soldering applications. Further process optimization and flux development is necessary to achieve the defect levels associated with the conventional SnPb process.

The introduction of alternative, non-lead bearing solders into electronic assemblies requires a thorough investigation of product manufacturability and reliability. Both of these attributes can be impacted by the excessive growth of intermetallic compound (IMC) layers at the solder/substrate interface. An extensive study has documented the stoichiometry and solid state growth kinetics of IMC layers formed between copper and the lead-free solders: 96.5Sn-3.5Ag (wt.%), 95Sn-5Sb, 100Sn, and 58Bi-42Sn. Aging temperatures were 70--205 C for the Sn-based solders and 55--120 C for the Bi-rich solder. Time periods were 1--400 days for all of the alloys. The Sn/Cu, Sn-Ag/Cu, and Sn-Sb/Cu IMC layers exhibited sub-layers of Cu{sub 6}Sn{sub 5} and Cu{sub 3}Sn; the latter composition was present only following prolonged aging times or higher temperatures. The total layer growth exhibited a time exponent of n = 0.5 at low temperatures and a value of n = 0.42 at higher temperatures in each of the solder/Cu systems. Similar growth kinetics were observed with the low temperature 58Bi-42Sn solder; however, a considerably more complex sub-layer structure was observed. The kinetic data will be discussed with respect to predicting IMC layer growth based upon solder composition.