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Resistive memory device requirements for a neural algorithm accelerator

Proceedings of the International Joint Conference on Neural Networks

Agarwal, Sapan A.; Plimpton, Steven J.; Hughart, David R.; Hsia, Alexander W.; Richter, Isaac; Cox, Jonathan A.; James, Conrad D.; Marinella, Matthew J.

Resistive memories enable dramatic energy reductions for neural algorithms. We propose a general purpose neural architecture that can accelerate many different algorithms and determine the device properties that will be needed to run backpropagation on the neural architecture. To maintain high accuracy, the read noise standard deviation should be less than 5% of the weight range. The write noise standard deviation should be less than 0.4% of the weight range and up to 300% of a characteristic update (for the datasets tested). Asymmetric nonlinearities in the change in conductance vs pulse cause weight decay and significantly reduce the accuracy, while moderate symmetric nonlinearities do not have an effect. In order to allow for parallel reads and writes the write current should be less than 100 nA as well.

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Resistive memory device requirements for a neural algorithm accelerator

Proceedings of the International Joint Conference on Neural Networks

Agarwal, Sapan A.; Plimpton, Steven J.; Hughart, David R.; Hsia, Alexander W.; Richter, Isaac R.; Cox, Jonathan A.; James, Conrad D.; Marinella, Matthew J.

Resistive memories enable dramatic energy reductions for neural algorithms. We propose a general purpose neural architecture that can accelerate many different algorithms and determine the device properties that will be needed to run backpropagation on the neural architecture. To maintain high accuracy, the read noise standard deviation should be less than 5% of the weight range. The write noise standard deviation should be less than 0.4% of the weight range and up to 300% of a characteristic update (for the datasets tested). Asymmetric nonlinearities in the change in conductance vs pulse cause weight decay and significantly reduce the accuracy, while moderate symmetric nonlinearities do not have an effect. In order to allow for parallel reads and writes the write current should be less than 100 nA as well.

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Creating wide band gap LEDs without P-doping

Device Research Conference - Conference Digest, DRC

Agarwal, Sapan A.; Dickerson, Jeramy R.; Tsao, Jeffrey Y.

Wide band gap semiconductors like AlN typically cannot be efficiently p-doped: acceptor levels are far from the valence band-edge, preventing holes from activating. This means that pn-junctions cannot be created, and the semiconductor is less useful, a particular problem for deep Ultraviolet (UV) optoelectronics.

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Energy scaling advantages of resistive memory crossbar based computation and its application to sparse coding

Frontiers in Neuroscience

Agarwal, Sapan A.; Quach, Tu-Thach Q.; Parekh, Ojas D.; DeBenedictis, Erik; James, Conrad D.; Marinella, Matthew J.; Aimone, James B.

The exponential increase in data over the last decade presents a significant challenge to analytics efforts that seek to process and interpret such data for various applications. Neural-inspired computing approaches are being developed in order to leverage the computational properties of the analog, low-power data processing observed in biological systems. Analog resistive memory crossbars can perform a parallel read or a vector-matrix multiplication as well as a parallel write or a rank-1 update with high computational efficiency. For an N × N crossbar, these two kernels can be O(N) more energy efficient than a conventional digital memory-based architecture. If the read operation is noise limited, the energy to read a column can be independent of the crossbar size (O(1)). These two kernels form the basis of many neuromorphic algorithms such as image, text, and speech recognition. For instance, these kernels can be applied to a neural sparse coding algorithm to give an O(N) reduction in energy for the entire algorithm when run with finite precision. Sparse coding is a rich problem with a host of applications including computer vision, object tracking, and more generally unsupervised learning.

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The energy scaling advantages of RRAM crossbars

2015 4th Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2015 - Proceedings

Agarwal, Sapan A.; Parekh, Ojas D.; Quach, Tu-Thach Q.; James, Conrad D.; Aimone, James B.; Marinella, Matthew J.

As transistors start to approach fundamental limits and Moore's law slows down, new devices and architectures are needed to enable continued performance gains. New approaches based on RRAM (resistive random access memory) or memristor crossbars can enable the processing of large amounts of data[1, 2]. One of the most promising applications for RRAM crossbars is brain inspired or neuromorphic computing[3, 4].

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The low voltage TFET demands higher perfection than previously required in electronics

Device Research Conference - Conference Digest, DRC

Agarwal, Sapan A.; Yablonovitch, Eli

Tunneling Field Effect Transistors (TFETs) have the potential to achieve a low operating voltage by overcoming the thermally limited subthreshold swing of 60mV/decade, but results to date have been unsatisfying. Unfortunately, TFETs have only shown steep subthreshold swings at low currents of a nA/μm or lower while we would like a mA/μm. To understand this we need to consider the two switching mechanisms in a TFET. The gate voltage can be used to modulate the tunneling barrier thickness and thus the tunneling probability as shown Fig. 1(a). Alternatively, it is possible use energy filtering or density of states (DOS) switching as illustrated in Fig. 1(b). If the conduction and valence band don't overlap, no current can flow. Once they do overlap, current can flow.

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Results 126–149 of 149
Results 126–149 of 149