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Decreasing network power with on-off links informed by scientific applications

Proceedings - IEEE 27th International Parallel and Distributed Processing Symposium Workshops and PhD Forum, IPDPSW 2013

Hendry, Gilbert H.

As the tapering off of Moore's Law produces the need for more parallelism in high-performance applications, the parallel programming model becomes central to achieving and maintaining performance per watt on current and future computer architectures. In order for a programmer to exploit parallelism in a power-efficient way, a close interaction with an abstract machine model is necessary to remain cognizant of important power-performance tradeoffs. This work introduces Asynchronous Circuit Programming (ACP), a way of explicitly identifying application communication as circuits to allow the underlying hardware to better execute code, and for a programmer to pipeline the allocation of communication hardware resources with computation. We provide a case study in using a preliminary C++ implementation of ACP with multiple scientific applications that illustrates how hardware can make use of application knowledge, keeping up to 75% of links in a low-power state. © 2013 IEEE.

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TYPE Conference YEAR 2013
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Results 1–25 of 28
Results 1–25 of 28