Publications

Eutectic bonding in semiconductor fabrication requires a large degree of control over the stoichiometry and precision film thickness of the bonding materials. To reduce the migration of the bonding layers, diffusion barriers are typically utilized. Here, we demonstrate that a widely utilized diffusion barrier, Pt, does not prevent migration of Si in Si/Au eutectic bonding. We observe that this barrier breaks down at approximately 375° C, above the Au-Si eutectic temperature (363° C), and encourages consumption of the silicon substrate leading to uncontrolled stoichiometry variations and creation of microvoids. This failure results in reductions of bond strength and hermeticity. As an alternative, silicon dioxide is observed to prevent the silicon diffusion and subsequent substrate loss. © 2011-2012 IEEE.

We report a new wafer-level packaging technology for miniature MEMS in a hermetic micro-environment. The unique and new feature of this technology is that it only uses low cost wafer-level processes such as eutectic bonding, Bosch etching and mechanical lapping and thinning steps as compared to more expensive process steps that will be required in other alternative wafer-level technologies involving thru-silicon vias or membrane lids. We have demonstrated this technology by packaging silicon-based AlN microsensors in packages of size 1.3 1.3 mm2 and 200 micrometer thick. Our initial cost analysis has shown that when mass produced with high yields, this device will cost $0.10 to $0.90. The technology involves first preparing the lid and MEMS wafers separately with the sealring metal stack of Ti/Pt/Au on the MEMS wafers and Ti/Pt/Au/Ge/Au on the lid wafers. On the MEMS wafers, the Signal/Power/Ground interconnections to the wire-bond pads are isolated from the sealring metallization by an insulating AlN layer. Prior to bonding, the lid wafers were Bosch-etched in the wirebond pad area by 120 um and in the center hermetic device cavity area by 20 um. The MEMS and the lid wafers were then aligned and bonded in vacuum or in a nitrogen environment at or above the Au-Ge Eutectic temperature, 363C. The bonded wafers were then thinned and polished first on the MEMS side and then on the lid side. The MEMS side was thinned to 100 ums with a nearly scratch-free and crack-free surface. The lid side was similarly thinned to 100 ums exposing the wire-bond pads. After thinning, a 100 um thick lid remained over the MEMS features providing a 20 um high hermetic micro-environment. Thinned MEMS/Lid wafer-level assemblies were then sawed into individual devices. These devices can be integrated into the next-level assembly either by wire-bonding or by surface mounting. The wafer-level packaging approach developed in this project demonstrated RF Feedthroughs with 0.3 dB insertion loss and adequate RF performance through 2 GHz. Pressure monitoring Pirani structures built inside the hermetic lids have demonstrated the ability to detect leaks in the package. In our preliminary development experiments, we have demonstrated 50% hermetic yields. © 2011 IEEE.

Abstract not provided.