Publications Details
Application specific Tester-On-a-Resident-Chip (TORCH{trademark}) - innovation in the area of semiconductor testing
Manufacturers widely recognize testing as a major factor in the cost, producability, and delivery of product in the $100 billion integrated circuit business: {open_quotes}The rapid development of VLSI using sub-micron CMOS technology has suddenly exposed traditional test techniques as a major cost factor that could restrict the development of VLSI devices exceeding 512 pins an operating frequencies above 200 MHz.{close_quotes} -- 1994 Semiconductor Industry Association Roadmap, Design and Test, Summary, pg. 43. This problem increases dramatically for stockpile electronics, where small production quantities make it difficult to amortize the cost of increasingly expensive testers. Application of multiple ICs in Multi-Chip Modules (MCM) greatly multiplies testing problems for commercial and defense users alike. By traditional test methods, each new design requires custom test hardware and software and often dedicated testing equipment costing millions of dollars. Also, physical properties of traditional test systems often dedicated testing equipment costing millions of dollars. Also, physical properties of traditional test systems limit capabilities in testing at-speed (>200 MHz), high-impedance, and high-accuracy analog signals. This project proposed a revolutionary approach to these problems: replace the multi-million dollar external test system with an inexpensive test system integrated onto the product wafer. Such a methodology enables testing functions otherwise unachievable by conventional means, particularly in the areas of high-frequency, at-speed testing, high impedance analog circuits, and known good die assessment. The techniques apply specifically to low volume applications, typical of Defense Programs, where testing costs represent an unusually high proportional of product costs, not easily amortized.