Silicon MCM substrates for integration of III-V photonic devices and CMOS IC`s
The progress made in advanced packaging development at Sandia National Laboratories for integration of III-V photonic devices and CMOS IC`s on Silicon MCM substrates for planar aid stacked applications will be reported. Studies to characterize precision alignment techniques using solder attach materials compatible with both silicon IC`s and III-V devices will be discussed. Examples of the use of back-side alignment and IR through-wafer inspection will be shown along with the extra processing steps that are used. Under bump metallurgy considerations are also addressed.