Publications

There is a void of public specifications for pulse discharge capacitor applications. Sandia National Laboratories has developed, over the past 25 years, specifications and test procedures for evaluating capacitor designs for this specialized use. There are three primary destructive tests that are used to assess the reliability potential of a given design at a required rated voltage. These are ultimate short time breakdown strength, life at voltage, and pulse discharge life. The strategy of the method is to accelerate the test conditions so that failures are observable and then extrapolate to the desired use conditions where the failure rates are low. This paper will present the statistical methodologies employed to analyze experimental data and to provide a point estimate of reliability with a lower confidence bound as a function of rated voltage. In addition, methods for establishing lot-acceptance-criteria specifications will be discussed. The techniques will be illustrated with actual data on a commercially available, low-inductance, pulse-discharge capacitor. The capacitor is an impregnated dual dielectric (mica-paper/polymer film), extended-foil type.

The Capacitors Division at Sandia National Laboratories has for many years been actively involved in developing high reliability, low-inductance, energy-storage, pulse-discharge capacitors. Development has concentrated on two dielectric systems; mica-paper and Mylar (both dry wrap and fill and FC40 liquid impregnation). Continuous design improvements are constantly being sought. For pulse discharge usage lowering the capacitor inductance can improve circuit performance. This paper describes recent efforts to improve the efficiency of low-inductance, mica-paper capacitors by reducing the inductance through optimizing the component geometry. The study focused on a 0.2 {mu}F, 4000 V mica-paper extended-foil capacitor design. The experimental matrix was a two-level, three factor with center points design, and was replicated four times to give reasonable statistics. The factors were the capacitor width, capacitor length, and electrode width, and with response functions of capacitor inductance and circuit performance. The capacitor inductance was measured by the resonance technique, and the circuit performance was evaluated by peak (discharge) current and rise time. Results show that the inductance can be minimized by choice of geometry with accompanying improvements in circuit performance.