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Verifying Simulator Readiness for Evaluating Potential Exascale Interconnect Technologies [PowerPoint]

Hemmert, Karl S.; Wilke, Jeremiah J.; Kenny, Joseph P.; Lewis, Cannada L.; Bhatele, Abhinav; Georgakoudis, Giorgis; Pakin, Scott; Mubarak, Misbah; Groves, Taylor

Goals of the milestone are to: verify key hardware contention models in controlled environment; validate simulator readiness for future milestones; and, provide baseline to define cross-validation workflow across teams for ''bracketing'' results.