Publications Details
Fast and slow border traps in MOS devices
In this paper we apply a ``dual-transistor border-trap`` (DTBT) technique that combines high-frequency charge-pumping and lower-frequency threshold-voltage measurements to estimate bulk-oxide-trap, interface-trap, and border-trap densities in irradiated MOS transistors. This method takes advantage of the different time scales in which interface traps and border traps exchange charge with the Si to obtain an estimate of the density of faster border traps often mistaken for interface traps. Effects of slower border traps are also inferred from changes in the ``bulk`` oxide-trap charge density through switched-bias annealing. To our knowledge, this is the first time fast and slow border-trap effects have been separated quantitatively in MOS devices. Possible microstructures for fast and slow border traps are suggested.