Publications Details
Case history: Failure analysis of a CMOS SRAM with an intermittent open contact
Analysis of an intermittent failure to write the 1'' state to a particular memory location at low temperature ({minus}55{degree}C) in a 16K {times} 1 CMOS SRAM is presented. The failure was found to be due to an open metallization at a metal-to-silicon contact. The root cause of the failure was poor step coverage of the metallization over an oxide step. A variety of failure analysis techniques including dynamic electron beam analysis at low temperature using a Peltier cold stage were employed to study the intermittently failing SRAM. The failure site was located by using capacitive coupling voltage contrast analysis. PSPICE simulation, light emission microscopy, scanning electron microscopy, and focused-ion beam techniques were used to confirm the failure mechanism and location. The write cycle time of the failed IC was abnormally long, but within the allowable tester limit. The vulnerability of other ICs to failure by open metallization in metal-to-silicon contacts is reviewed. 8 refs., 10 figs., 2 tabs.