The longevity of high gain GaAs photoconductive semiconductor switches (PCSS) has been extended to over 100 million pulses at 23A, and over 100 pulses at 1kA. This is achieved by improving the ohmic contacts by doping the semi-insulating GaAs underneath the metal, and by achieving a more uniform distribution of contact wear across the entire switch by distributing the trigger light to form multiple filaments. This paper will compare various approaches to doping the contacts, including ion implantation, thermal diffusion, and epitaxial growth. The device characterization also includes examination of the filament behavior using open-shutter, infra-red imaging during high gain switching. These techniques provide information on the filament carrier densities as well as the influence that the different contact structures and trigger light distributions have on the distribution of the current in the devices. This information is guiding the continuing refinement of contact structures and geometries for further improvements in switch longevity.
The authors have demonstrated a functional MOCVD-grown AlGaAs/InGaAsN/GaAsPnP DHBT that is lattice matched to GaAs and has a peak current gain ({beta}) of 25. Because of the smaller bandgap (E{sub g}=1.20eV)of In{sub 0.03}Ga{sub 0.97}As{sub 0.99}N{sub 0.01} used for the base layer, this device has a low V{sub ON} of 0.79 V, 0.25 V lower than in a comparable Pnp AlGaAs/GaAs HBT. The BV{sub CEO} is 12 V, consistent with its GaAs collector thickness and doping level.
A high voltage GaAs HBT with an open-base collector breakdown voltage of 106 V and an open-emitter breakdown voltage of 134 V has been demonstrated. A high quality 9.0 {micro}m thick collector doped to 2.0{times}10{sup 15} cm{sup {minus}3} grown by MBE on a doped GaAs substrate is the key to achieving this breakdown. These results were achieved for HBTs with 4{times}40 {micro}m{sup 2} emitters. DC current gain of 38 at 6,000 A/cm{sup 2} was measured.
The authors have demonstrated a functional NpN double heterojunction bipolar transistor (DHBT) using InGaAsN for base layer. The InGaP/In{sub 0.03}Ga{sub 0.97}As{sub 0.99}N{sub 0.01}/GaAs DHBT has a low V{sub ON} of 0.81 V, which is 0.13 V lower than in a InGaP/GaAs HBT. The lower V{sub ON} is attributed to the smaller bandgap (E{sub g}=1.20eV) of MOCVD grown In{sub 0.03}Ga{sub 0.97}As{sub 0.99}N{sub 0.01} base layer. GaAs is used for the collector; thus the BV{sub CEO} is 10 V, consistent with the BV{sub CEO} of InGaP/GaAs Hbts of comparable collector thickness and doping level. To alleviate the current blocking phenomenon caused by the larger {triangle}E{sub C} between InGaAsN and GaAs, a graded InGaAs layer with {delta}-doping is inserted at the base-collector junction. The improved device has a peak current gain of 7 with ideal IV characteristics.
The authors demonstrate, for the first time, a functional N-p-n heterojunction bipolar transistor using a novel material, InGaAsN, with a bandgap energy of 1.2eV as the p-type base layer. A 300{angstrom}-thick In{sub x}Ga{sub 1-x}As graded layer was introduced to reduce the conduction band offset at the p-type InGaAsN base and n-type GaAs collector junction. For an emitter size of 500 {mu}m{sup 2}, a peak current gain of 5.3 has been achieved.
The authors demonstrated a functional PnP double heterojunction bipolar transistor (DHBT) using AlGaAs, InGaAsN, and GaAs. The band alignment between InGaAsN and GaAs has a large {triangle}E{sub c} and negligible {triangle}E{sub v}, this unique characteristic is very suitable for PnP DHBT applications. The metalorganic vapor phase epitaxy (MOCVD) grown Al{sub 0.3}Ga{sub 0.7}As/In{sub 0.03}Ga{sub 0.97}As{sub 0.99}N{sub 0.01}/GaAs PnP DHBT is lattice matched to GaAs and has a peak current gain of 25. Because of the smaller bandgap (E{sub g}=1.20eV) of In{sub 0.03}Ga{sub 0.97}As{sub 0.99}N{sub 0.01} used for the base layer, this device has a low V{sub ON} of 0.79 V, which is 0.25 V lower than in a comparable Pnp AlGaAs/GaAs HBT. And because GaAs is used for the collector, its BV{sub CEO} is 12 V, consistent with BV{sub CEO} of AlGaAs/GaAs HBTs.
Junction field effect transistors (JFET) were fabricated on a GaN epitaxial structure grown by metal organic chemical vapor deposition. The DC and microwave characteristics, as well as the high temperature performance of the devices were studied. These devices exhibited excellent pinch-off and a breakdown voltage that agreed with theoretical predictions. An extrinsic transconductance (gm) of 48 mS/mm was obtained with a maximum drain current (ID) of 270 mA/mm. The microwave measurement showed an fT of 6 GHz and an fmax of 12 GHz. Both the ID and the gm were found to decrease with increasing temperature, possibly due to lower electron mobility at elevated temperatures. These JFETs exhibited a significant current reduction after a high drain bias was applied, which was attributed to a partially depleted channel caused by trapped electrons in the semi-insulating GaN buffer layer.
A new class of semiconductor laser is presented that does not require p-n junctions. Spectral narrowing, lasing thresholds, beam divergence, temporal narrowing, and energies are shown for these lasers based on current filaments in bulk GaAs.
The LDRD entitled ``Role of Defects in III-Nitride Based Devices'' is aimed to place Sandia National Laboratory at the forefront of the field of GaN materials and devices by establishing a scientific foundation in areas such as material growth, defect characterization/modeling, and processing (metalization and etching) chemistry. In this SAND report the authors summarize their studies such as (1) the MOCVD growth and doping of GaN and AlGaN, (2) the characterization and modeling of hydrogen in GaN, including its bonding, diffusion, and activation behaviors, (3) the calculation of energetic of various defects including planar stacking faults, threading dislocations, and point defects in GaN, and (4) dry etching (plasma etching) of GaN (n- and p-types) and AlGaN. The result of the first AlGaN/GaN heterojunction bipolar transistor is also presented.
The longevity of high gain GaAs photoconductive semiconductor switches (PCSS) has been extended to over 100 million pulses. This was achieved by improving the ohmic contacts through the incorporation of a doped layer that is very effective in the suppression of filament formation, alleviating current crowding. Damage-free operation is now possible with virtually infinite expected lifetime at much higher current levels than before. The inherent damage-free current capacity of the bulk GaAs itself depends on the thickness of the doped layers and is at least 100A for a dopant diffusion depth of 4pm. The contact metal has a different damage mechanism and the threshold for damage ({approx}40A) is not further improved beyond a dopant diffusion depth of about 2{micro}m. In a diffusion-doped contact switch, the switching performance is not degraded when contact metal erosion occurs, unlike a switch with conventional contacts. This paper will compare thermal diffusion and epitaxial growth as approaches to doping the contacts. These techniques will be contrasted in terms of the fabrication issues and device characteristics.
The authors have demonstrated a functional Pnp heterojunction bipolar transistor (HBT) using InGaAsN. The metalorganic vapor phase epitaxy (MOCVD) grown Al{sub 0.3}Ga{sub 0.7}As/In{sub 0.03}Ga{sub 0.97}As{sub 0.99}N{sub 0.01} HBT takes advantage of the narrower bandgap energy (E{sub g} = 1.25eV) of In{sub 0.03}Ga{sub 0.97}As{sub 0.99}N{sub 0.01}, which is lattice matched to GaAs. Compared with the Al{sub 0.3}Ga{sub 0.7}As/GaAs material system, the Al{sub 0.3}Ga{sub 0.7}As/In{sub 0.03}Ga{sub 0.97}As{sub 0.99}N{sub 0.01} material system has a larger conduction band offset, while the valence band offset remains comparable. This characteristic band alignment is very suitable for Pnp HBT applications. The device's peak current gain is 23 and it has a turn on voltage of 0.77V, which is 0.25V lower than in a comparable Pnp Al{sub 0.3}Ga{sub 0.7}As/GaAs HBT.
Plasma-induced etch damage can degrade the electrical and optical performance of III-V nitride electronic and photonic devices. We have investigated the etch-induced damage of an Inductively Coupled Plasma (ICP) etch system on the electrical performance of mesa-isolated GaN pn-junction diodes. GaN p-i-n mesa diodes were formed by Cl{sub 2}/BCl{sub 3}/Ar ICP etching under different plasma conditions. The reverse leakage current in the mesa diodes showed a strong relationship to chamber pressure, ion energy, and plasma flux. Plasma induced damage was minimized at moderate flux conditions ({le} 500 W), pressures {ge}2 mTorr, and at ion energies below approximately -275 V.
Monolithic, integrated acoustic wave chemical microsensors are being developed on gallium arsenide (GaAs) substrates. With this approach, arrays of microsensors and the high frequency electronic components needed to operate them reside on a single substrate, increasing the range of detectable analytes, reducing overall system size, minimizing systematic errors, and simplifying assembly and packaging. GaAs is employed because it is both piezoelectric, a property required to produce the acoustic wave devices, and a semiconductor with a mature microelectronics fabrication technology. Many aspects of integrated GaAs chemical sensors have been investigated, including: surface acoustic wave (SAW) sensors; monolithic SAW delay line oscillators; GaAs application specific integrated circuits (ASIC) for sensor operation; a hybrid sensor array utilizing these ASICS; and the fully monolithic, integrated SAW array. Details of the design, fabrication, and performance of these devices are discussed. In addition, the ability to produce heteroepitaxial layers of GaAs and aluminum gallium arsenide (AlGaAs) makes possible micromachined membrane sensors with improved sensitivity compared to conventional SAW sensors. Micromachining techniques for fabricating flexural plate wave (FPW) and thickness shear mode (TSM) microsensors on thin GaAs membranes are presented and GaAs FPW delay line and TSM resonator performance is described.
Multiple-energy (30-325 keV) O{sup +} implantation into GaN field-effect transistor structures (n {approximately} 10{sup 18} cm{sup {minus}3}, 3000 {angstrom} thick) can produce as-implanted sheet resistances of 4 x 10{sup 12} {Omega}/{open_square}, provided care is taken to ensure compensation of the region up to the projected range of the lowest energy implant. The sheet resistance remains above 10{sup 7} {Omega}/{open_square} to annealing temperatures of {approximately} 650 C and displays an activation energy of 0.29 eV. No diffusion of the implanted oxygen was observed for anneals up to 800 C.
An oscillator technology using surface acoustic wave delay lines integrated with GaAs MESFET electronics has been developed for GaAs-based integrated microsensor applications. The oscillator consists of a two-port SAW delay line in a feedback loop with a four-stage GaAs MESFET amplifier. Oscillators with frequencies of 470, 350, and 200 MHz have been designed and fabricated. These oscillators are also promising for other RF applications.
A GaN based depletion mode metal oxide semiconductor field effect transistor (MOSFET) was demonstrated using Ga2O3(Gd2O3) as the gate dielectric. The MOS gate reverse breakdown voltage was >35 V which was significantly improved from 17 V of Pt Schottky gate on the same material. A maximum extrinsic transconductance of 15 mS/mm was obtained at Vds = 30 V and device performance was limited by the contact resistance. A unity current gain cut-off frequency, fT, and maximum frequency of oscillation, fmax of 3.1 and 10.3 GHz, respectively, were measured at Vds = 25 V and Vgs = -20 V.
Self-aligned GaAs JFET narrowband amplifiers operating at 2.4 GHz were designed and fabricated with both discrete WETS as a hybrid amplifier and as RFICS. Enhancement-mode JFETs were used in order to be compatible with complementary digital logic. Hybrid amplifiers achieved 8-10 dB of gain at 2.4 GHz and 1 mW DC bias level. The RFIC achieved 10 dB of gain at 24 GHz and 2 mW DC bias level.
GaGdO was deposited on GaN for use as a gate dielectric in order to fabricate a depletion metal oxide semiconductor field effect transistor (MOSFET). This is the fmt demonstration of such a device in the III-Nitride system. Analysis of the effect of temperature on the device shows that gate leakage is significantly reduced at elevated temperature relative to a conventional metal semiconductor field effeet transistor (MESFET) fabricated on the same GaN layer. MOSFET device operation in fact improved upon heating to 400 C. Modeling of the effeet of temperature on contact resistance suggests that the improvement is due to a reduction in the parasitic resistances present in the device.
A GaN/AIGaN heterojunction bipolar transistor has been fabricated using C12/Ar dry etching for mesa formation. As the hole concentration increases due to more efficient ionization of the Mg acceptors at elevated temperatures (> 250oC), the device shows improved gain. Future efforts which are briefly summarized. should focus on methods for reducing base resistance.
In this work the authors report results of narrowband amplifiers designed for milliwatt and submilliwatt power consumption using JFET and pseudomorphic high electron mobility transistors (PHEMT) GaAs-based technologies. Enhancement-mode JFETs were used to design both a hybrid amplifier with off-chip matching as well as a monolithic microwave integrated circuit (MMIC) with on-chip matching. The hybrid amplifier achieved 8--10 dB of gain at 2.4 GHz and 1 mW. The MMIC achieved 10 dB of gain at 2.4 GHz and 2 mW. Submilliwatt circuits were also explored by using 0.25 {micro}m PHEMTs. 25 {micro}W power levels were achieved with 5 dB of gain for a 215 MHz hybrid amplifier. These results significantly reduce power consumption levels achievable with the JFETs or prior MESFET, heterostructure field effect transistor (HFET), or Si bipolar results from other laboratories.
This report summarizes work on the development of ultra-low power microwave CHFET integrated circuit development. Power consumption of microwave circuits has been reduced by factors of 50--1,000 over commercially available circuits. Positive threshold field effect transistors (nJFETs and PHEMTs) have been used to design and fabricate microwave circuits with power levels of 1 milliwatt or less. 0.7 {micro}m gate nJFETs are suitable for both digital CHFET integrated circuits as well as low power microwave circuits. Both hybrid amplifiers and MMICs were demonstrated at the 1 mW level at 2.4 GHz. Advanced devices were also developed and characterized for even lower power levels. Amplifiers with 0.3 {micro}m JFETs were simulated with 8--10 dB gain down to power levels of 250 microwatts ({mu}W). However 0.25 {micro}m PHEMTs proved superior to the JFETs with amplifier gain of 8 dB at 217 MHz and 50 {mu}W power levels but they are not integrable with the digital CHFET technology.
GaN MIS diodes were demonstrated utilizing AlN and Ga{sub 2}O{sub 3}(Gd{sub 2}O{sub 3}) as insulators. A 345 {angstrom} of AlN was grown on the MOCVD grown n-GaN in a MOMBE system using trimethylamine alane as Al precursor and nitrogen generated from a wavemat ECR N2 plasma. For the Ga{sub 2}O{sub 3}(Gd{sub 2}O{sub 3}) growth, a multi MBE chamber was used and a 195 {angstrom} oxide is E-beam evaporated from a single crystal source of Ga{sub 5}Gd{sub 3}O{sub 12}. The forward breakdown voltage of AlN and Ga{sub 2}O{sub 3}(Gd{sub 2}O{sub 3}) diodes are 5V and 6V, respectively, which are significantly improved from {approximately} 1.2 V of schottky contact. From the C-V measurements, both kinds of diodes showed good charge modulation from accumulation to depletion at different frequencies. The insulator GaN interface roughness and the thickness of the insulator were measured with x-ray reflectivity.
A doped-channel heterostructure field effect transistor (H-FET) technology has been developed with self-aligned refractory gate processing and using both enhancement- and depletion-mode transistors. D-HFET devices are obtained with a threshold voltage adjust implant into material designed for E-HFET operation. Both E- and D-HFETs utilize W/WSi bilayer gates, sidewall spacers, and rapid thermal annealing for controlling short channel effects. The 0.5 {mu}m E- HFETs (D-HFETs) have been demonstrated with transconductance of 425 mS/mm (265-310 mS/mm) and f{sub t} of 45-50 GHz. Ring oscillator gate delays of 19 ps with a power of 0.6 mW have been demonstrated using direct coupled FET logic. These results are comparable to previous doped-channel HFET devices and circuits fabricated by selective reactive ion etching rather than ion implantation for threshold voltage adjustment.
A survey of ohmic contact materials and properties to GaAs, InP, GaN will be presented along with critical issues pertaining to each semiconductor material. Au-based alloys (e.g., GeAuNi for n-type GaAs) are the most commonly used contacts for GaAs and InP materials for both n- and p-type contacts due to the excellent contact resistivity, reliability, and usefulness over a wide range of doping levels. Research into new contacting schemes for these materials has focused on addressing limitations of the conventional Au-alloys in thermal stability, propensity for spiking, poor edge definition, and new approaches for a non-alloyed contact. The alternative contacts to GaAs and InP include alloys with higher temperature stability, contacts based on solid phase regrowth, and contacts that react with the substrate to form lower bandgap semiconductors alloys at the interface. A new area of contact studies is for the wide bandgap group III-Nitride materials. At present, low resistivity ohmic contact to p-type GaN has not been obtained primarily due to the large acceptor ionization energy and the resultant difficulty in achieving high free hole concentrations at room temperature. For n-type GaN, however, significant progress has been reported with reactive Ti-based metalization schemes or the use of graded InGaN layers. The present status of these approaches will be reviewed.
Development of a complementary heterostructure field effect transistor (CHFET) technology for low-power, mixed-mode digital-microwave applications is presented. Digital CHFET technology with independently optimizable transistors has been shown to operate with 319 ps loaded gate delays at 8.9 fJ. Power consumption is dominated by leakage currents of the p-channel FET, while performance is determined by the characteristics of 0.7 {mu}m gate length devices. As a microwave technology, the nJFET forms the basis of low-power cirucitry without any modification to the digital process. Narrow band amplification with a 0.7x100 {mu}m nJFET has been demonstrated at 2.1-2.4 GHz with gains of 8-10 dB at 1 mW power. These amplifiers showed a minimum noise figure of 2.5 dB. Next generation CHFET transistors with sub 0.5 {mu}m gate lengths have also been developed. Cutoff frequencies of 49 and 11.5 GHz were achieved for n- and p-channel FETs with 0.3 and 0.4 {mu}m gates, respectively. These FETs will enable enhancements in both digital and microwave circuits.