Analysis of PTL routes for LSI of superconducting logic circuits
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Computing uses energy. At the bare minimum, erasing information in a computer increases the entropy. Landauer has calculated %7E kBT log(2) Joules is dissipated per bit of energy erased. While the success of Moores law has allowed increasing computing power and efficiency for many years, these improvements are coming to an end. This project asks if there is a way to continue those gains by circumventing Landauer through reversible computing. We explore a new reversible computing paradigm, asynchronous ballistic reversible computing or ABRC. The ballistic nature of data in ABRC matches well with superconductivity which provides a low-loss environment and a quantized bit encoding the fluxon. We discuss both these and our development of a superconducting fabrication process at Sandia. We describe a fully reversible 1-bit memory cell based on fluxon dynamics. Building on this model, we propose several other gates which may also offer reversible operation.
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Simple but mission-critical internet-based applications that require extremely high reliability and availability could potentially benefit from running on robust public programmable blockchain platforms such as Ethereum. Unfortunately, program code running on such blockchains is ordinarily publicly viewable, rendering these platforms unsuitable for applications requiring strict privacy of application code, data, and results. However, might it be possible to encode an application's business logic and data for these platforms in such a way that it becomes impossible for unauthorized parties to infer any meaningful information whatsoever about the semantics of the data, and the operations being performed on that data? In this report, we describe GABLE (Garbled Autonomous Bots Leveraging Ethereum), a system concept developed at Sandia that achieves this security goal in a limited, but still useful range of circumstances. GABLE, uses simple but effective algorithms to permit secure private execution of garbled state machines (and more efficient garbled circuits) on public computing resources. We give an example working implementation for garbled state machines, written using the Python and Solidity programming languages, and outline how our methods can be extended to support a more powerful garbled universal circuit model of computation. The capability embodied by the GABLE, system has significant potential applications, a few of which we discuss in this report.
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As new memory technologies appear on the market, there is a growing push to incorporate them into future architectures. Compared to traditional DDR DRAM, these technologies provide appealing advantages such as increased bandwidth or non-volatility. However, the technologies have significant downsides as well including higher cost, manufacturing complexity, and for non-volatile memories, higher latency and wear-out limitations. As such, no technology has emerged as a clear technological and economic winner. As a result, systems are turning to the concept of multi-level memory, or mixing multiple memory technologies in a single system to balance cost, performance, and reliability.
IEEE Transactions on Applied Superconductivity
We measure the frequency dependence of a niobium microstrip resonator as a function of temperature from 1.4 to 8.4 K. In a 2-micrometer-wide half-wave resonator, we find the frequency of resonance changes by a factor of 7 over this temperature range. From the resonant frequencies, we extract inductance per unit length, characteristic impedance, and propagation velocity (group velocity). We discuss how these results relate to superconducting electronics. Over the 2 K to 6 K temperature range where superconducting electronic circuits operate, inductance shows a 19% change and both impedance and propagation velocity show an 11% change.
IEEE Transactions on Applied Superconductivity
In a previous paper, we described a new abstract circuit model for reversible computation called asynchronous ballistic reversible computing (ABRC), in which localized information-bearing pulses propagate ballistically along signal paths between stateful abstract devices and elastically scatter off those devices serially, while updating the device state in a logically-reversible and deterministic fashion. The ABRC model has been shown to be capable of universal computation. In the research reported here, we begin exploring how the ABRC model might be realized in practice using single flux quantum solitons (fluxons) in superconducting Josephson junction (JJ) circuits. One natural family of realizations could utilize fluxon polarity to represent binary data in individual pulses propagating near-ballistically, along discrete or continuous long Josephson junctions or microstrip passive transmission lines, and utilize the flux charge (-1, 0, +1) of a JJ-containing superconducting loop with Φ0 < IcL < 2Φ0 to encode a ternary state variable internal to a device. A natural question then arises as to which of the definable abstract ABRC device functionalities using this data representation might be implementable using a JJ circuit that dissipates only a small fraction of the input fluxon energy. We discuss conservation rules and symmetries considered as constraints to be obeyed in these circuits, and begin the process of classifying the possible ABRC devices in this family having up to three bidirectional I/O terminals, and up to three internal states.
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ISEC 2019 - International Superconductive Electronics Conference
In an ongoing project at Sandia National Laboratories, we are attempting to develop a novel style of superconducting digital processing, based on a new model of reversible computation called Asynchronous Ballistic Reversible Computing (ABRC). We envision an approach in which polarized flux-ons scatter elastically from near-lossless functional components, reversibly updating the local digital state of the circuit, while dissipating only a small fraction of the input fluxon energy. This approach to superconducting digital computation is sufficiently unconventional that an appropriate methodology for hand-design of such circuits is not immediately obvious. To gain insight into the design principles that are applicable in this new domain, we are creating a software tool to automatically enumerate possible topologies of reactive, undamped Josephson junction circuits, and sweep the parameter space of each circuit searching for designs exhibiting desired dynamical behaviors. But first, we identified by hand a circuit implementing the simplest possible nontrivial ABRC functional behavior with bits encoded as conserved polarized fluxons, namely, a one-bit reversible memory cell with one bidirectional I/O port. We expect the tool to be useful for designing more complex circuits.
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