Sandia National Laboratories, New Mexico P.O. Box 5800 Albuquerque, NM 87185-1322
Biography
The CMOS technology is famously approaching its scaling limit: within the next decade or so, nano-scale FET transistors will reach the sub 5-nm physical gate lengths, at which point any further reduction of their sizes will likely become impractical and even impossible due to the thermal fluctuation noise. There are beyond-CMOS and non-charge based alternatives, some of which may be scaled below the 5-nm gate length and possibly down to atomic sizes. In any case, at that point the foreseeable human scientific and technological capabilities will reach the ultimate scaling limit for the elementary logic and memory device size.
In my research I am trying to answer the following questions:
What are the corresponding limits of computation?
How much computing can we actually perform and how much information we can actually store with 1 kg of non-exotic matter (i.e. far, far below Bekenstein bound)?
Which device-architecture paradigms can allow us to continue increasing FLOPS/kg ratio after the CMOS scaling limit is reached?
Can this increase still follow the exponential (“new Moore’s law”) trend?
If you like to discuss these and other (e.g. digital physics) fascinating subjects or have an idea about a potential CMOS replacement and would like to test it via computer simulation – please give me a call or send me an email.
Education
B. Verkin Institute for Low Temperature Physics & Engineering,
Ph.D. in Physics and Mathematics, Kharkov, Ukraine, November 2000.
Kharkov State University, Physics Department, division of theoretical physics,
M.S. in Physics (with honors), Kharkov, Ukraine, June 1997.
UNESCO at Kharkov University,
M.A. in Philosophy of Communications and Management, Kharkov, Ukraine, May 1997.
Appointments
2012-pres.: Senior R&D scientist and engineer, Sandia National Laboratories
2006-2011: Research professor, ECEE, ASU
2005-2006: Faculty research associate, ECEE, ASU
2002-2005: Research associate, Department of Electrical Engineering, ASU
2000-2002: Post-doctorate fellow, Walter Schottky Institute, Technische Universität München, Munich, Germany
Publications
Mamaluy, D., Mendez Granado, J., & Mendez Granado, J. (2022). Revealing conductivity of p-type delta layer systems for novel computing applications. https://doi.org/10.2172/1887942Publication ID: 80214
Mamaluy, D., Mendez Granado, J., Gao, X., Misra, S., & Misra, S. (2021). Revealing quantum effects in highly conductive δ-layer systems. Communications Physics, 4(1). https://doi.org/10.1038/s42005-021-00705-1Publication ID: 79264
Mendez Granado, J., Mamaluy, D., Gao, X., Misra, S., & Misra, S. (2021). Quantum Transport Simulations for Si:P δ-layer Tunnel Junctions [Conference Paper]. 2021 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD). https://doi.org/10.1109/sispad54002.2021.9592565Publication ID: 79465
Mendez Granado, J., Mamaluy, D., Gao, X., Misra, S., & Misra, S. (2021). Quantum Transport Simulations for Si:P δ-layer Tunnel Junctions [Conference Presenation]. International Conference on Simulation of Semiconductor Processes and Devices, SISPAD. https://doi.org/10.1109/sispad54002.2021.9592565Publication ID: 75873
Allemang, C., Anderson, E., Baczewski, A., Bussmann, E., Butera, R., Campbell, D., Campbell, Q., Carr, S., Frederick, E., Gamache, P., Gao, X., Grine, A., Gunter, M., Halsey, C., Ivie, J., Katzenmeyer, A., Leenheer, A., Lepkowski, W., Lu, T., … Young, S. (2021). FAIR DEAL Grand Challenge Overview. https://doi.org/10.2172/1854733Publication ID: 75955
Mendez Granado, J., Mamaluy, D., & Mamaluy, D. (2021). Quantum Effects of Unintentional Dopants in delta-layer Tunnel Junctions [Conference Presenation]. https://doi.org/10.2172/1867275Publication ID: 79464
Mendez Granado, J., Mamaluy, D., Gao, X., Misra, S., & Misra, S. (2021). Conductive Properties of Tunnel Junctions in Semiconductor delta-layer Systems [Conference Presenation]. https://doi.org/10.2172/1867274Publication ID: 78488
Mendez Granado, J., Mamaluy, D., Gao, X., Misra, S., & Misra, S. (2021). Quantum Transport Framework for Highly Conductive delta-layer Systems [Conference Presenation]. https://doi.org/10.2172/1866559Publication ID: 78327
Gao, X., Tracy, L., Anderson, E., Campbell, D., Ivie, J., Lu, T., Mamaluy, D., Schmucker, S., Misra, S., & Misra, S. (2020). Modeling assisted room temperature operation of atomic precision advanced manufacturing devices [Conference Poster]. International Conference on Simulation of Semiconductor Processes and Devices, SISPAD. https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85096243933&origin=inwardPublication ID: 74763
Mendez Granado, J., Mamaluy, D., Gao, X., Anderson, E., Campbell, D., Ivie, J., Lu, T., Schmucker, S., Misra, S., & Misra, S. (2020). Quantum Transport in Si:P δ-Layer Wires [Conference Poster]. 2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD). https://doi.org/10.23919/sispad49475.2020.9241610Publication ID: 74626
Mendez Granado, J., Mamaluy, D., Gao, X., Anderson, E., Campbell, D., Ivie, J., Lu, T., Schmucker, S., Misra, S., & Misra, S. (2020). Quantum transport in Si:P δ-layer wires [Conference Poster]. https://www.osti.gov/biblio/1820274Publication ID: 74794
Gao, X., Tracy, L., Anderson, E., Campbell, D., Ivie, J., Lu, T., Mamaluy, D., Schmucker, S., Misra, S., & Misra, S. (2020). Modeling Assisted Room Temperature Operation of Atomic Precision Advanced Manufacturing Devices [Conference Poster]. https://doi.org/10.23919/SISPAD49475.2020.9241642Publication ID: 74647
Gao, X., Mamaluy, D., Lepkowski, W., Young, S., & Young, S. (2020). FAIR DEAL GC Thrust 2: APAM Modeling [Presentation]. https://www.osti.gov/biblio/1808429Publication ID: 74069
Mamaluy, D., Granado, J., Gao, X., & Gao, X. (2019). Quantum transport in APAM wires [Conference Poster]. https://www.osti.gov/biblio/1643480Publication ID: 66700
Gao, X., Mamaluy, D., Anderson, E., Campbell, D., Grine, A., Katzenmeyer, A., Lu, T., Schmucker, S., Tracy, L., Ward, D., Misra, S., & Misra, S. (2019). Modeling Assisted Atomic Precision Advanced Manufacturing (APAM) Towards Room Temperature Operation [Conference Poster]. https://www.osti.gov/biblio/1643549Publication ID: 66586
Gao, X., Mamaluy, D., Tracy, L., Ward, D., Bussmann, E., & Bussmann, E. (2019). Modeling assisted APAM towards room temperature operation [Presentation]. https://www.osti.gov/biblio/1700540Publication ID: 66031
Mamaluy, D., Mendez Granado, J., Gao, X., & Gao, X. (2019). Quantum Transport in APAM Wires: Consequences of the novel electronic structure of Si:P δ-layered systems [Presentation]. https://www.osti.gov/biblio/1700543Publication ID: 66034
Gao, X., Mamaluy, D., Goldflam, M., & Goldflam, M. (2019). FAIR DEAL GC Thrust 2: APAM modeling [Presentation]. https://www.osti.gov/biblio/1646191Publication ID: 66073
Mamaluy, D., Gao, X., Tierney, B.D., & Tierney, B.D. (2016). Fully-Coupled Thermo-Electrical Modeling and Simulation of Transition Metal Oxide Memristors. https://doi.org/10.2172/1331433Publication ID: 47603
Musson, L., Hennigan, G., Gao, X., Mamaluy, D., & Mamaluy, D. (2016). RAMSES / Charon Progress and Code Collaboration Overview [Conference Poster]. https://www.osti.gov/biblio/1410250Publication ID: 47904
Hughart, D.R., Gao, X., Mamaluy, D., Marinella, M., Mickel, P., & Mickel, P. (2016). Power signatures of electric field and thermal switching regimes in memristive SET transitions. Journal of Physics. D, Applied Physics, 49(24). https://doi.org/10.1088/0022-3727/49/24/245103Publication ID: 80707
Mamaluy, D., Gao, X., Marinella, M., & Marinella, M. (2016). Comprehensive Assessment of Oxide Memristors as Post-CMOS Memory and Logic Devices [Conference Poster]. https://www.osti.gov/biblio/1368819Publication ID: 50206
Gao, X., Mamaluy, D., Cyr, E.C., Marinella, M.J., & Marinella, M.J. (2016). Comprehensive assessment of oxide memristors as post-CMOS memory and logic devices. ECS Transactions, 72(3), pp. 49-58. https://doi.org/10.1149/07203.0049ecstPublication ID: 48851
Tierney, B.D., Hjalmarson, H.P., McLain, M., Hughart, D.R., Marinella, M., Mamaluy, D., & Mamaluy, D. (2015). Transport Physics in Thin-Film Oxides: From Capacitors to Memristors [Conference Poster]. https://www.osti.gov/biblio/1331866Publication ID: 46503
Gao, X., Mamaluy, D., Mickel, P., Marinella, M., & Marinella, M. (2015). Three-dimensional fully-coupled electrical and thermal transport model of dynamic switching in oxide memristors. ECS Transactions (Online), 69(5), pp. 183-193. https://doi.org/10.1149/06905.0183ecstPublication ID: 44343
Arrowsmith, M., Guildenbecher, D., Mamaluy, D., & Mamaluy, D. (2015). LDRD @ SNL May 2015. https://doi.org/10.2172/1184074Publication ID: 43800
Mamaluy, D., Gao, X., & Gao, X. (2015). The fundamental downscaling limit of field effect transistors. Applied Physics Letters, 106(19). https://doi.org/10.1063/1.4919871Publication ID: 42744
Tierney, B.D., Hjalmarson, H.P., McLain, M., Mamaluy, D., & Mamaluy, D. (2015). The Role of Joule Heating and Defect Chemistry in Memristor Modeling [Conference Poster]. https://www.osti.gov/biblio/1241114Publication ID: 42353
Gao, X., Mamaluy, D., Mickel, P., Marinella, M., & Marinella, M. (2015). Three-Dimensional Fully-Coupled Electrical and Thermal Transport Model of Oxide Memristors [Conference Poster]. https://www.osti.gov/biblio/1240110Publication ID: 42239
Gao, X., Mamaluy, D., Mickel, P.R., Marinella, M., & Marinella, M. (2015). Three-dimensional fully-coupled electrical and thermal transport model of dynamic switching in oxide memristors [Conference Poster]. ECS Transactions. https://doi.org/10.1149/06905.0183ecstPublication ID: 46053
Mamaluy, D., Gao, X., Tierney, B.D., & Tierney, B.D. (2014). The ultimate downscaling limit of FETs. https://doi.org/10.2172/1160288Publication ID: 38989
Marinella, M., Mickel, P., Lohn, A.J., Hughart, D.R., Bondi, R., Mamaluy, D., Hjalmarson, H.P., Stevens, J., Decker, S., Apodaca, R., Evans, B., Aimone, J.B., Rothganger, F., James, C., Debenedictis, E.P., & Debenedictis, E.P. (2014). Development characterization and modeling of a TaOx ReRAM for a neuromorphic accelerator [Conference Poster]. https://doi.org/10.2172/1241888Publication ID: 38906
Marinella, M., Mickel, P., Lohn, A.J., Hughart, D.R., Bondi, R., Mamaluy, D., Hjalmarson, H.P., Stevens, J., Decker, S., Apodaca, R., Evans, B., Aimone, J.B., Rothganger, F., James, C., Debenedictis, E.P., & Debenedictis, E.P. (2014). Development Characterization and Modeling of a TaOx ReRAM for a Neuromorphic Accelerator [Conference Poster]. https://doi.org/10.1149/06414.0037ecstPublication ID: 38905
Gao, X., Mamaluy, D., & Mamaluy, D. (2014). Quantum Transport Simulation and Optimization of Below-6-nm Si FinFETs with HfSiON/SiO2 Gate Dielectrics [Presentation]. https://www.osti.gov/biblio/1496695Publication ID: 37616
Gao, X., Mamaluy, D., Nielsen, E., Young, R., Muller, R., Bishop, N., Lilly, M., Carroll, M., & Carroll, M. (2013). Efficient self-consistent quantum transport simulator for quantum devices. Journal of Applied Physics. https://www.osti.gov/biblio/1121374Publication ID: 31751
Gao, X., Mamaluy, D., Nielsen, E., Muller, R., Young, R., Bishop, N., Lilly, M., Carroll, M., & Carroll, M. (2013). Efficient Self-Consistent Quantum Transport Simulator for Quantum Well Devices [Conference]. https://www.osti.gov/biblio/1080393Publication ID: 33805
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Awards & Recognition
2022
Denis Mamaluy, Juan Pedro Mendez Granado, , Denis Mamaluy, FAIR DEAL Grand Challenge LDRD Project, Sandia National Laboratories ,
Sandia National Laboratories, Team A - INNOVATION, Divisions ESD - 5000
,
May 3, 2022
2021
Denis Mamaluy, Juan Pedro Mendez Granado, , Denis Mamaluy, Recognized at D1K Tier Board, D1K Tier Board,
Susan Seestrom, Recognized for https://www.nature.com/articles/s42005-021-00705-1
,
October 11, 2021
2012
Denis Mamaluy, , Denis Mamaluy, Senior Member, IEEE, Senior Member is the highest professional grade of the IEEE for which a member may apply. It requires experience, and reflects professional accomplishment and maturity. Only 8% of IEEE 416,000 members have achieved this level.,
September 4, 2012