Suma George Cardwell

Principal Member of Technical Staff

Author profile picture

Principal Member of Technical Staff

sgcardw@sandia.gov

(505) 845-9705

Biography

Dr. Suma George Cardwell is a Principal Member of Technical Staff in the Center for Computing Research at Sandia National Laboratories. She completed her PhD and MS in Electrical and Computer Engineering at Georgia Tech, Atlanta in 2015 and 2011 respectively. She has over ten years of experience in neuromorphic computing, experience in digital/analog system design, IC design, and developing neural algorithms.

She also has industry experience, working as Director of Engineering at Mavric Semiconductor researching low power edge computing systems using AI/ML algorithms and at Blackberry designing new system architectures. Her current research focuses on neuromorphic computing, event-based processing, co-design of hardware and machine learning algorithms, AI-enhanced approach to microelectronics and applications of heterogeneous systems from HPC to the edge.

Current areas of interest include:

  • Neuromorphic Computing
  • Bio-inspired Algorithms, Circuits, Systems and Architectures
  • Probabilistic Neural Computing
  • AI-Enhanced Circuit and System Design
  • Neuromorphic Edge Computing
  • Hardware-Aware Machine Learning
  • Heterogeneous Architectures

Education

PhD, Electrical and Computer Engineering, Georgia Tech, Atlanta, GA, 2015

M.S., Electrical and Computer Engineering, Georgia Tech, Atlanta, GA, 2011

B.Tech, Electrical and Computer Engineering, GGSIPU, New Delhi, India, 2008

Publications

  1. Shashank Misra, Leslie C. Bland, Suma G Cardwell, Jean Anne Incorvia, Conrad D. James, Andrew D Kent, Catherine D Schuman, J. Darby Smith, and James B. Aimone, “Probabilistic Neural Computing with Stochastic Devices”, Advanced Materials Review 2022.
  2. S. Cardwell, F. Chance, C. Vineyard and J.B. Aimone. Accepted Position paper,  
    “Achieving Extreme Heterogeneity: CoDesign using Neuromorphic Processors”, ASCR Reimagining codesign Workshop 2021. 
  3. Craig Vineyard, Suma Cardwell, Frances Chance, Srideep Musuvathy, Fred Rothganger, William Severa, John Smith, Corinne Teeter, Felix Wang, James Aimone, “Neural Mini-Apps as a Tool for Neuromorphic Computing Insight”, ACM Neuro-inspired Computational Elements 2022, Pg. 40-49, DOI. 
  4. Luke Parker, Frances Chance, Suma Cardwell, “Benchmarking a Bio-inspired SNN on a Neuromorphic System”, ACM Neuro-inspired Computational Elements 2022, Pg. 63-66, DOI. 
  5. Cardwell, Suma George, Vineyard, Craig and Severa, William and Chance, Frances and Rothganger, Fredrick and Wang, Felix and Musuvathy, Srideep and Teeter, Corinne and Aimone, James B. “Truly heterogeneous HPC: Co-design to achieve what science needs from HPC” Smoky Mountain Computational Sciences and Engineering Conference 2020
  6. Christopher H. Bennett*, Ryan Dellana*, T. Patrick Xiao, Ben Feinberg, Sapan Agarwal, Suma George Cardwell, Matthew J. Marinella, William Severa, Brad Aimone. “Evaluating complexity and resilience trade-offs in emerging memory inference machines,”  Neuro Inspired Computational Elements Workshop 2020
  7. S.Cardwell, F. Chance, C. Vineyard and J.B. Aimone. Accepted position paper,
    “Achieving Extreme Heterogeneity: CoDesign using Neuromorphic Processors    ”, ASCR Reimagining codesign Workshop 2021
  8. S. George, S. Kim, S. Shah, J. Hasler, M. Collins, F. Adil, R. Wunderlich, and S. Nease. “A Programmable and Configurable Mixed-Mode FPAA SoC,” IEEE TVLSI, 2016.
  9. S. Kim, J. Hasler, and S. George, “Programming algorithms for Floating-gates,” IEEE TVLSI, 2016.
  10. S. Ramakrishnan, R. Wunderlich, J. Hasler, and S. George. “Neuron Array with Plastic Synapses and Programmable Dendrites,” IEEE TBIOCAS, 2013.
  11. S. George-Cardwell, J. Hasler, S. Koziol, and S. Nease. “Low power dendritic computation for wordspotting,” Journal of Low Power Electronics and Applications (JLPEA), 2013.
  12. S. Nease, S. George-Cardwell, P. Hasler, S. Koziol, and S. Brink. “Modeling and Implementation of Voltage-Mode CMOS Dendrites on a Reconfigurable Analog Platform," IEEE Transaction on Biomedical Circuits and Systems (TBIOCAS), 2011.
  13. M. Collins, J. Hasler, and S. George-Cardwell. “Analog Systems Education: An Integrated Toolset and FPAA SoC Boards,” IEEE MSE, 2015.