Publications

Krath, E.H., Galvan, E., Thornquist, H.K., & Thornquist, H.K. (2024). Projection-based Reduced-Order Models for Compact Circuit Models [Presentation]. 10.2172/2585953

Pollard, S.D., Aytac, J.M., Kellison, A.E., Laguna, I., Nedunuri, S., Reis, S.A., Sottile, M.J., Thornquist, H.K., & Thornquist, H.K. (2024). The First Tri-Lab Workshop on Formal Verification: Capabilities, Challenges, Research Opportunities, and Exemplars. 10.2172/2430026

Keiter, E.R., Schiek, R., Thornquist, H.K., Mei, T., Verley, J.C., Schickling, J.D., Aadithya, K.V., Hennigan, G.L., & Hennigan, G.L. (2023). Xyce™ Parallel Electronic Simulator Users’ Guide, Version 7.8. 10.2172/2430136

Thornquist, H.K., Keiter, E.R., Schiek, R., Mei, T., Verley, J.C., Aadithya, K.V., Schickling, J.D., Hennigan, G.L., & Hennigan, G.L. (2023). Xyce™ Parallel Electronic Simulator Version 7.8 Release Notes. 10.2172/2430135

Keiter, E.R., Schiek, R., Thornquist, H.K., Mei, T., Verley, J.C., Aadithya, K.V., Schickling, J.D., & Schickling, J.D. (2023). Xyce™ Parallel Electronic Simulator Users’ Guide (V.7.7). 10.2172/2430866

Corral, C.A., Thornquist, H.K., & Thornquist, H.K. (2023). Combined CRC and Bit Framing for Enhanced Error Detection [Conference Paper]. Conference Proceedings - IEEE SOUTHEASTCON. 10.1109/SoutheastCon51012.2023.10115195

Keiter, E.R., Russo, T.V., Schiek, R., Thornquist, H.K., Mei, T., Verley, J.C., Aadithya, K.V., Schickling, J.D., & Schickling, J.D. (2022). Xyce™ Parallel Electronic Simulator Users' Guide (V.7.6). 10.2172/1895029

Keiter, E.R., Russo, T.V., Schiek, R., Thornquist, H.K., Mei, T., Verley, J.C., Aadithya, K.V., Schickling, J.D., & Schickling, J.D. (2022). Xyce™ Parallel Electronic Simulator Reference Guide (V.7.6). 10.2172/1895028

Kellison, A.E., Appel, A., Bindel, D., Thornquist, H.K., Hulette, G.C., & Hulette, G.C. (2022). Verification Toolchain for Floating-Point Programs [Conference Poster]. 10.2172/2004015

Loe, J.A., Morgan, R., Embree, M., Boman, E.G., Thornquist, H.K., & Thornquist, H.K. (2022). Polynomial Preconditioning with the GMRES Polynomial [Conference Presentation]. 10.2172/2003457

Keiter, E.R., Russo, T.V., Schiek, R., Thornquist, H.K., Mei, T., Verley, J.C., Aadithya, K.V., Schickling, J.D., & Schickling, J.D. (2022). Xyce™ Parallel Electronic Simulator Users' Guide, Version 7.5. 10.2172/1866027

Keiter, E.R., Russo, T.V., Schiek, R., Thornquist, H.K., Mei, T., Verley, J.C., Aadithya, K.V., Schickling, J.D., & Schickling, J.D. (2022). Xyce™ Parallel Electronic Simulator Reference Guide, Version 7.5. 10.2172/1868425

Keiter, E.R., Verley, J.C., Thornquist, H.K., Kuberry, P., Galvan, E., & Galvan, E. (2022). Xyce Circuit Simulator and Surrogate Modeling [Presentation]. https://www.osti.gov/biblio/2003386

Rajamanickam, S., Heinlein, A., Thornquist, H.K., Yamazaki, I., & Yamazaki, I. (2021). Trilinos User Group MeetingSolvers Update [Conference Presentation]. 10.2172/1900353

Pollard, S.D., Kellison, A., Bender, J., Thornquist, H.K., Hulette, G.C., & Hulette, G.C. (2021). Real(istic) Specifications of Software [Conference Paper]. https://www.osti.gov/biblio/2002959

Thornquist, H.K. (2021). Adventures of a Mid-Career Mathematician in Radiation & Electrical Sciences [Presentation]. https://www.osti.gov/biblio/1891754

Keiter, E.R., Russo, T.V., Schiek, R., Thornquist, H.K., Mei, T., Verley, J.C., Sholander, P.E., Aadithya, K.V., Schickling, J.D., & Schickling, J.D. (2021). Xyce Parallel Electronic Simulator Users' Guide Version 7.4. 10.2172/1829574

Keiter, E.R., Russo, T.V., Schiek, R., Thornquist, H.K., Mei, T., Verley, J.C., Sholander, P.E., Aadithya, K.V., Schickling, J.D., & Schickling, J.D. (2021). Xyce™ Parallel Electronic Simulator Reference Guide (V.7.4). 10.2172/1826862

Hulette, G.C., Bender, J., Pollard, S.D., Thornquist, H.K., Kellison, A., & Kellison, A. (2021). Formal Methods-based Certification Frameworks for Scientific Computing Applications [Conference Paper]. https://www.osti.gov/biblio/1897880

Keiter, E.R., Verley, J.C., Thornquist, H.K., Kuberry, P., Galvan, E., & Galvan, E. (2021). Xyce Circuit Simulator and Surrogate Modeling [Conference Poster]. 10.2172/1889599

Keiter, E.R., Russo, T.V., Schiek, R., Thornquist, H.K., Mei, T., Verley, J.C., Sholander, P.E., Aadithya, K.V., & Aadithya, K.V. (2021). Xyce™ Parallel Electronic Simulator Reference Guide, Version 7.3. 10.2172/1821531

Keiter, E.R., Russo, T.V., Schiek, R., Thornquist, H.K., Mei, T., Verley, J.C., Sholander, P.E., Aadithya, K.V., & Aadithya, K.V. (2021). Xyce Parallel Electronic Simulator Users' Guide (V. 7.3). 10.2172/1810049

Keiter, E.R., Russo, T.V., Schiek, R., Thornquist, H.K., Mei, T., Verley, J.C., Sholander, P.E., Aadithya, K.V., & Aadithya, K.V. (2020). Xyce Parallel Electronic Simulator Reference Guide (Version 7.2). 10.2172/1718980

Keiter, E.R., Russo, T.V., Schiek, R., Thornquist, H.K., Mei, T., Verley, J.C., Sholander, P.E., Aadithya, K.V., & Aadithya, K.V. (2020). Xyce Parallel Electronic Simulator Users' Guide (Version 7.2). 10.2172/1718981

Mei, T., Huang, A., Thornquist, H.K., Sholander, P.E., Verley, J.C., & Verley, J.C. (2020). Prediction of Circuit Response to an Electromagnetic Environment (ASC IC FY2020 Milestone 7179). 10.2172/1663259

Keiter, E.R., Russo, T.V., Schiek, R., Thornquist, H.K., Mei, T., Verley, J.C., Sholander, P.E., Aadithya, K.V., & Aadithya, K.V. (2020). Xyce Parallel Electronic Simulator Users' Guide (V.7.1). 10.2172/1763514

Keiter, E.R., Russo, T.V., Schiek, R., Thornquist, H.K., Mei, T., Verley, J.C., Sholander, P.E., Aadithya, K.V., & Aadithya, K.V. (2020). Xyce Parallel Electronic Simulator Reference Guide (V.7.1). 10.2172/1763515

Loe, J.A., Thornquist, H.K., Boman, E.G., & Boman, E.G. (2020). Polynomial Preconditioned GMRES in Trilinos: Practical Considerations for High Performance Computing [Conference Poster]. 10.1137/1.9781611976137.4

Loe, J., Thornquist, H.K., Boman, E.G., & Boman, E.G. (2019). Polynomial Preconditioned GMRES in Trilinos: Practical Considerations for High-Performance Computing [Conference Poster]. 10.1137/1.9781611976137.4

Verley, J.C., Keiter, E.R., Russo, T.V., Schiek, R., Thornquist, H.K., Mei, T., Sholander, P.E., Aadithya, K.V., & Aadithya, K.V. (2019). Latest Developments in the Xyce Large-Scale Analog Circuit Simulator [Conference Poster]. https://www.osti.gov/biblio/1643112

Verley, J.C., Keiter, E.R., Thornquist, H.K., & Thornquist, H.K. (2019). Latest Developments in the Xyce Large-Scale Analog Circuit Simulator [Conference Poster]. https://www.osti.gov/biblio/1642834

Keiter, E.R., Aadithya, K.V., Mei, T., Thornquist, H.K., Sholander, P.E., Wilcox, I.Z., & Wilcox, I.Z. (2019). Exploring Advanced Embedded Uncertainty Quantification methods in Xyce. 10.2172/1569158

Loe, J.A., Thornquist, H.K., Boman, E.G., & Boman, E.G. (2019). Polynomial Preconditioning for Avoiding Communication in GMRES [Conference Poster]. https://www.osti.gov/biblio/1641026

Keiter, E.R., Thornquist, H.K., Verley, J.C., & Verley, J.C. (2019). Xyce: Open Source Simulation for Large-Scale Circuits [Conference Poster]. https://www.osti.gov/biblio/1639584

Keiter, E.R., Verley, J.C., Thornquist, H.K., & Thornquist, H.K. (2018). Xyce: Open Source Simulation for Large-Scale Circuits [Conference Poster]. https://www.osti.gov/biblio/1595909

Verley, J.C., Keiter, E.R., Russo, T.V., Thornquist, H.K., Mei, T., Sholander, P.E., Aadithya, K.V., & Aadithya, K.V. (2018). Xyce: Open Source Simulation for Large-Scale Circuits [Conference Poster]. https://www.osti.gov/biblio/1592352

Keiter, E.R., Aadithya, K.V., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., & Verley, J.C. (2018). Xyce Parallel Electronic Simulator Users' Guide Version 6.10. 10.2172/1481539

Keiter, E.R., Aadithya, K.V., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., & Verley, J.C. (2018). Xyce Parallel Electronic Simulator Reference Guide Version 6.10. 10.2172/1481540

Verley, J.C., Keiter, E.R., Thornquist, H.K., & Thornquist, H.K. (2018). Xyce: Open Source Simulation for Large-Scale Circuits [Conference Poster]. https://www.osti.gov/biblio/1592255

Thornquist, H.K. (2018). Parallel Simulation Capabilities in Xyce [Presentation]. https://www.osti.gov/biblio/1592316

Thornquist, H.K., Loe, J.A., Boman, E.G., & Boman, E.G. (2018). Polynomial Preconditioned GMRES for Communication Reduction [Conference Poster]. https://www.osti.gov/biblio/1592317

Thornquist, H.K., Keiter, E.R., Manohar, R., Mei, T., Aadithya, K.V., Russo, T.V., Sholander, P.E., & Sholander, P.E. (2018). AMS Verification Technologies and Flow for Enabling POSH SoCs [Conference Poster]. https://www.osti.gov/biblio/1806792

Keiter, E.R., Aadithya, K.V., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., & Verley, J.C. (2018). Xyce^TM Parallel Electronic Simulator Reference Guide, Version 6.9. 10.2172/1528751

Keiter, E.R., Aadithya, K.V., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., & Verley, J.C. (2018). Xyce^TM Parallel Electronic Simulator Users' Guide Version 6.9. 10.2172/1528752

Thornquist, H.K., Mei, T., Rajamanickam, S., Ellingwood, N.D., & Ellingwood, N.D. (2017). Using the Basker Linear Solvers in Xyce [Conference Poster]. https://www.osti.gov/biblio/1491763

Rajamanickam, S., Thornquist, H.K., Booth, J., & Booth, J. (2017). Basker : A Threaded Sparse LU factorization utilizing Hierarchical Parallelism and Data Layouts [Conference Poster]. https://www.osti.gov/biblio/1484926

Keiter, E.R., Aadithya, K.V., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., & Verley, J.C. (2017). Xyce™ Parallel Electronic Simulator Reference Guide Version 6.8. 10.2172/1405266

Keiter, E.R., Aadithya, K.V., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., & Verley, J.C. (2017). Xyce Parallel Electronic Simulator Users' Guide Version 6.8. 10.2172/1405267

Booth, J.D., Ellingwood, N.D., Thornquist, H.K., Rajamanickam, S., & Rajamanickam, S. (2017). Basker: Parallel sparse LU factorization utilizing hierarchical parallelism and data layouts. Parallel Computing, 68(C), pp. 17-31. 10.1016/j.parco.2017.06.003

Keiter, E.R., Aadithya, K.V., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., & Verley, J.C. (2017). Xyce Parallel Electronic Simulator Reference Guide Version 6.7. 10.2172/1367417

Keiter, E.R., Aadithya, K.V., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., & Verley, J.C. (2017). Xyce Parallel Electronic Simulator Users' Guide Version 6.7. 10.2172/1367422

Keiter, E.R., Aadithya, K.V., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., & Verley, J.C. (2016). Xyce Parallel Electronic Simulator Reference Guide Version 6.6. 10.2172/1333486

Keiter, E.R., Aadithya, K.V., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., & Verley, J.C. (2016). Xyce Parallel Electronic Simulator Users' Guide Version 6.6. 10.2172/1333487

Hough, P.D., Barone, M.F., Barrett, R.F., Mish, K.D., Thornquist, H.K., & Thornquist, H.K. (2016). Final Review Memo from ATDM L2 Milestone Review Panel to ATDM L2 Milestone Team and Associated Management. 10.2172/1562414

Booth, J.D., Rajamanickam, S., Thornquist, H.K., & Thornquist, H.K. (2016). Basker: A threaded sparse LU factorization utilizing hierarchical parallelism and data layouts [Conference Poster]. Proceedings - 2016 IEEE 30th International Parallel and Distributed Processing Symposium, IPDPS 2016. 10.1109/IPDPSW.2016.92

Keiter, E.R., Aadithya, K.V., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., & Verley, J.C. (2016). Xyce™ Parallel Electronic Simulator Users' Guide, Version 6.5. 10.2172/1259541

Keiter, E.R., Aadithya, K.V., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., & Verley, J.C. (2016). Xyce™ Parallel Electronic Simulator Reference Guide, Version 6.5. 10.2172/1259542

Rajamanickam, S., Booth, J., Thornquist, H.K., & Thornquist, H.K. (2016). Robust Solvers for Circuit Simulation on Modern Architectures [Presentation]. https://www.osti.gov/biblio/1530033

Keiter, E.R., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., Baur, D.G., & Baur, D.G. (2015). Xyce Parallel Electronic Simulator Users Guide Version 6.4. 10.2172/1229701

Keiter, E.R., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., Baur, D.G., & Baur, D.G. (2015). Xyce Parallel Electronic Simulator Reference Guide Version 6.4. 10.2172/1229702

Booth, J.D., Rajamanickam, S., Thornquist, H.K., & Thornquist, H.K. (2015). Basker: A Threaded Sparse LU Factorization Utilizing Hierarchical Parallelism and Data Layouts [Conference Poster]. 10.1109/IPDPSW.2016.92

Rajamanickam, S., Boman, E.G., Bradley, A.M., Booth, J.D., Deveci, M., Kim, K., Dohrmann, C.R., Thornquist, H.K., Chow, E., Patel, A., & Patel, A. (2015). ShyLU and Thread Scalable Subdomain Solvers [Presentation]. https://www.osti.gov/biblio/1514218

Keiter, E.R., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., Baur, D.G., & Baur, D.G. (2015). Xyce^TM Parallel Electronic Simulator Users’ Guide, Version 6.3. 10.2172/1504604

Keiter, E.R., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., Baur, D.G., & Baur, D.G. (2015). Xyce^TM Parallel Electronic Simulator Release Notes Release 6.3. 10.2172/1504605

Keiter, E.R., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., Baur, D.G., & Baur, D.G. (2015). Xyce^TM Parallel Electronic Simulator Reference Guide, Version 6.3. 10.2172/1504606

Barrett, R.F., Crozier, P., Doerfler, D.W., Heroux, M.A., Lin, P.T., Thornquist, H.K., Trucano, T.G., Vaughan, C.T., & Vaughan, C.T. (2015). Assessing the role of mini-applications in predicting key performance characteristics of scientific and engineering applications. Journal of Parallel and Distributed Computing, 75, pp. 107-122. https://doi.org/10.1016/j.jpdc.2014.09.006

Keiter, E.R., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., Baur, D.G., & Baur, D.G. (2014). Xyce Parallel Electronic Simulator Users Guide Version 6.2. 10.2172/1159115

Lehoucq, R., Boman, E.G., Devine, K., Thornquist, H.K., Slattengren, N.L., & Slattengren, N.L. (2014). Installing the Anasazi Eigensolver Package with Application to Some Graph Eigenvalue Problems. 10.2172/1494630

Keiter, E.R., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., & Verley, J.C. (2014). Xyce^TM Parallel Electronic Simulator Release Notes Release 6.1. 10.2172/1200660

Keiter, E.R., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., & Verley, J.C. (2014). Xyce^TM Parallel Electronic Simulator Users’ Guide, Version 6.1. 10.2172/1200661

Keiter, E.R., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., & Verley, J.C. (2014). Xyce^TM Parallel Electronic Simulator Reference Guide, Version 6.1. 10.2172/1200662

Keiter, E.R., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., & Verley, J.C. (2013). Xyce parallel electronic simulator release notes. 10.2172/1147632

Keiter, E.R., Warrender, C.E., Mei, T., Russo, T.V., Schiek, R., Thornquist, H.K., Verley, J.C., Coffey, T.S., Pawlowski, R., & Pawlowski, R. (2013). Xyce parallel electronic simulator users' guide, Version 6.0.1. 10.2172/1147554

Keiter, E.R., Mei, T., Russo, T.V., Pawlowski, R., Schiek, R., Coffey, T.S., Thornquist, H.K., Verley, J.C., Warrender, C.E., & Warrender, C.E. (2013). Xyce parallel electronic simulator reference guide, Version 6.0.1. 10.2172/1147677

Keiter, E.R., Russo, T.V., Schiek, R., Thornquist, H.K., Mei, T., Verley, J.C., Sholander, P.E., & Sholander, P.E. (2013). Building guide : how to build Xyce from source code. 10.2172/1096466

Russo, T.V., Mei, T., Keiter, E.R., Schiek, R., Thornquist, H.K., Verley, J.C., Coffey, T.S., Pawlowski, R., Warrender, C.E., & Warrender, C.E. (2013). Xyce parallel electronic simulator users guide, version 6.0. 10.2172/1096496

Keiter, E.R., Mei, T., Russo, T.V., Pawlowski, R., Schiek, R., Coffey, T.S., Thornquist, H.K., Verley, J.C., Warrender, C.E., & Warrender, C.E. (2013). Xyce parallel electronic simulator reference guide, version 6.0. 10.2172/1096463

Keiter, E.R., Mei, T., Russo, T.V., Schiek, R., Sholander, P.E., Thornquist, H.K., Verley, J.C., & Verley, J.C. (2013). Xyce parallel electronic simulator release notes. 10.2172/1096453

Thornquist, H.K. (2013). Scalable Transistor-Level Circuit Simulation for Radiation Effects Prediction [Presentation]. https://www.osti.gov/biblio/1661124

Keiter, E.R., Russo, T.V., Schiek, R., Mei, T., Thornquist, H.K., Coffey, T.S., Santarelli, K.R., Pawlowski, R., & Pawlowski, R. (2013). Xyce™ Parallel Electronic Simulator: Reference Guide (Version 5.1.2). 10.2172/1097213

Schiek, R., Mei, T., Rajamanickam, S., Keiter, E.R., Warrender, C.E., Aimone, J.B., Thornquist, H.K., Russo, T.V., Verley, J.C., Crossno, P.J., & Crossno, P.J. (2013). Neuron Simulation and Analysis with Xyce [Conference]. https://www.osti.gov/biblio/1064135

Schiek, R., Thornquist, H.K., Warrender, C.E., Mei, T., Teeter, C.M., Aimone, J.B., & Aimone, J.B. (2012). Simulating neural systems with Xyce. 10.2172/1096952

Rajamanickam, S., Boman, E.G., Heroux, M.A., Thornquist, H.K., & Thornquist, H.K. (2012). ShyLU: A Hybrid-Hybrid Solver [Conference]. https://www.osti.gov/biblio/1072647

Keiter, E.R., Warrender, C.E., Verley, J.C., Mei, T., Russo, T.V., Pawlowski, R., Schiek, R., Santarelli, K.R., Coffey, T.S., Thornquist, H.K., & Thornquist, H.K. (2012). Xyce Parallel Electronic Simulator : reference guide. 10.2172/1055909

Keiter, E.R., Warrender, C.E., Verley, J.C., Mei, T., Russo, T.V., Pawlowski, R., Schiek, R., Santarelli, K.R., Coffey, T.S., Thornquist, H.K., & Thornquist, H.K. (2012). Xyce Parallel Electronic Simulator : users' guide. 10.2172/1055902

Thornquist, H.K. (2012). Sparse Matrix Techniques for Next-Generation Parallel Transistor-level Circuit Simulation [Presentation]. https://www.osti.gov/biblio/1650311

Thornquist, H.K. (2012). Trilinos: Foundational libraries that enable next-generation computing [Presentation]. https://www.osti.gov/biblio/1650312

Barrett, R.F., Doerfler, D.W., Crozier, P., Heroux, M.A., Lin, P.T., Thornquist, H.K., Trucano, T.G., Vaughan, C.T., & Vaughan, C.T. (2012). Characterize the Role of the Mini-Applications in Predicting Key Performance Characteristics of Real Applications [Presentation]. https://www.osti.gov/biblio/1650485

Mei, T., Thornquist, H.K., Keiter, E.R., Hutchinson, S.A., & Hutchinson, S.A. (2011). Structure preserving reduced-order modeling of linear periodic time-varying systems [Conference]. IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84855791165&origin=inward

Schiek, R., Warrender, C.E., Thornquist, H.K., Mei, T., Keiter, E.R., Russo, T.V., & Russo, T.V. (2011). Advanced partitioning and integration techniques to improve parallel performance of densely connected neuron simulations [Conference]. https://www.osti.gov/biblio/1111634

Keiter, E.R., Mei, T., Thornquist, H.K., & Thornquist, H.K. (2011). Accelerating transient simulation of linear reduced order models. 10.2172/1029817

Thornquist, H.K. (2011). Cascading Failure Stimulator - CotillaSanchez-Parmer [Conference]. https://www.osti.gov/biblio/1119775

Thornquist, H.K., Hoemmen, M.F., Heroux, M.A., Lehoucq, R., Parks, M.L., Day, D.M., & Day, D.M. (2011). A Tutorial on Anasazi and Belos [Presentation]. https://www.osti.gov/biblio/1661524

Boman, E.G., Heroux, M.A., Keiter, E.R., Rajamanickam, S., Schiek, R., Thornquist, H.K., & Thornquist, H.K. (2011). Enabling Next-Generation Parallel Circuit Simulation with Trilinos [Conference]. https://www.osti.gov/biblio/1118668

Warrender, C.E., Thornquist, H.K., Mei, T., Keiter, E.R., Russo, T.V., & Russo, T.V. (2011). Parallel design simulation for neurologically inspired systems [Conference]. https://www.osti.gov/biblio/1120326

Keiter, E.R., Warrender, C.E., Mei, T., Russo, T.V., Pawlowski, R., Schiek, R., Santarelli, K.R., Coffey, T.S., Thornquist, H.K., & Thornquist, H.K. (2011). Xyce parallel electronic simulator : reference guide. 10.2172/1018462

Keiter, E.R., Warrender, C.E., Mei, T., Russo, T.V., Pawlowski, R., Schiek, R., Santarelli, K.R., Coffey, T.S., Thornquist, H.K., & Thornquist, H.K. (2011). Xyce parallel electronic simulator : users' guide. 10.2172/1018452

Thornquist, H.K. (2011). Efficient Preconditioners for Large-Scale Parallel Circuit Simulation [Presentation]. https://www.osti.gov/biblio/1671602

Thornquist, H.K., Mei, T., Tuminaro, R.S., & Tuminaro, R.S. (2010). Solution methods for very highly integrated circuits. 10.2172/1011611

Keiter, E.R., Thornquist, H.K., Hoekstra, R.J., Russo, T.V., Schiek, R., & Schiek, R. (2010). Parallel Transistor-Level Circuit Simulation [Presentation]. 10.1007/978-94-007-0149-6_1

Thornquist, H.K. (2010). Advanced in Parallel Transistor-Level Circuit Simulation [Presentation]. https://www.osti.gov/biblio/1675216

Keiter, E.R., Russo, T.V., Schiek, R., Thornquist, H.K., Mei, T., & Mei, T. (2010). Xyce parallel electronic simulator design. 10.2172/1029823

Keiter, E.R., Santarelli, K.R., Hoekstra, R.J., Russo, T.V., Schiek, R., Mei, T., Thornquist, H.K., Pawlowski, R., Coffey, T.S., & Coffey, T.S. (2010). Xyce™ Parallel Electronic Simulator Release Notes (Release 5.1.2). 10.2172/1097210

Thornquist, H.K., Day, D.M., Boman, E.G., Keiter, E.R., & Keiter, E.R. (2010). Linear Solver Challenges in Large-Scale Circuit Simulation [Presentation]. https://www.osti.gov/biblio/1682553

Keiter, E.R., Thornquist, H.K., Schiek, R., & Schiek, R. (2009). Parallel algorithm strategies for circuit simulation. 10.2172/989383

Thornquist, H.K., Keiter, E.R., & Keiter, E.R. (2009). Large Scale Parallel Circuit Simulation [Conference]. https://www.osti.gov/biblio/1141382

Keiter, E.R., Mei, T., Russo, T.V., Pawlowski, R., Schiek, R., Santarelli, K.R., Coffey, T.S., Thornquist, H.K., & Thornquist, H.K. (2009). Xyce parallel electronic simulator : users' guide. Version 5.1. 10.2172/1004374

Keiter, E.R., Mei, T., Russo, T.V., Pawlowski, R., Schiek, R., Santarelli, K.R., Coffey, T.S., Thornquist, H.K., & Thornquist, H.K. (2009). Xyce™ Parallel Electronic Simulator: Reference Guide, Version 5.1. 10.2172/1324999

Doerfler, D.W., Crozier, P., Edwards, H.C., Williams, A.B., Rajan, M., Keiter, E.R., Thornquist, H.K., & Thornquist, H.K. (2009). Improving performance via mini-applications. 10.2172/993908

Barone, M.F., Tezaur, I.K., Segalman, D.J., Thornquist, H.K., & Thornquist, H.K. (2009). Stable Galerkin reduced order models for linearized compressible flow. Journal of Computational Physics, 228(6), pp. 1932-1946. https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=59149099445&origin=inward

Keiter, E.R., Mei, T., Russo, T.V., Pawlowski, R., Schiek, R., Santarelli, K.R., Coffey, T.S., Thornquist, H.K., & Thornquist, H.K. (2009). Xyce Parallel Electronic Simulator : reference guide, version 4.1. 10.2172/972490

Keiter, E.R., Mei, T., Russo, T.V., Pawlowski, R., Schiek, R., Santarelli, K.R., Coffey, T.S., Thornquist, H.K., & Thornquist, H.K. (2009). Xyce Parallel Electronic Simulator : users' guide, version 4.1. 10.2172/972491

Keiter, E.R., Thornquist, H.K., Day, D.M., Boman, E.G., Hoekstra, R.J., & Hoekstra, R.J. (2008). A New Parallel Strategy for Transistor-Level Circuit Simulation [Conference]. https://www.osti.gov/biblio/1142417

Warrender, C.E., Forsythe, J.C., Ravula, S.K., Keiter, E.R., Russo, T.V., Thornquist, H.K., & Thornquist, H.K. (2008). Neurlogical Modeling Constraints: UQ from experiments to simulations [Conference]. https://www.osti.gov/biblio/1142596

Thornquist, H.K., Heroux, M.A., Parks, M.L., Lehoucq, R., & Lehoucq, R. (2008). Belos: A Framework for Next-generation Iterative Linear Solvers [Presentation]. https://www.osti.gov/biblio/1712856

Segalman, D.J., Tezaur, I.K., Payne, J.L., Thornquist, H.K., & Thornquist, H.K. (2008). Galerkin Reduced Order Models for Compressible Flow with Structural Interaction [Presentation]. https://doi.org/10.2514/6.2008-612

Hoekstra, R.J., Thornquist, H.K., Day, D.M., Boman, E.G., & Boman, E.G. (2008). Partitioning and Preconditioning for Circuit Simulation [Conference]. https://www.osti.gov/biblio/1146153

Barone, M.F., Segalman, D.J., Thornquist, H.K., Kalashnikova, I., & Kalashnikova, I. (2008). Galerkin reduced order models for compressible flow with structural interaction [Conference]. 46th AIAA Aerospace Sciences Meeting and Exhibit. https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=78149438166&origin=inward

Thornquist, H.K. (2007). Amesos: Sparse Direct Solver Package [Presentation]. https://www.osti.gov/biblio/1720255

Thornquist, H.K. (2007). Using Belos: Next-generation Iterative Solvers [Presentation]. https://www.osti.gov/biblio/1720256

Thornquist, H.K. (2007). An Overview of Trilinos [Presentation]. https://www.osti.gov/biblio/1713167

Thornquist, H.K. (2007). New Preconditioning Techniques for Arnoldi's Method [Presentation]. https://www.osti.gov/biblio/1723070

Hetmaniuk, U., Thornquist, H.K., Baker, C.G., Lehoucq, R., & Lehoucq, R. (2007). Anasazi software for the numerical solution of large-scale eigenvalue problems. Proposed for publication in ACM Transactions on Math Software.. https://www.osti.gov/biblio/903141

Heroux, M.A., Kolda, T.G., Long, K.R., Hoekstra, R.J., Pawlowski, R., Phipps, E.T., Salinger, A.G., Williams, A.B., Hu, J.J., Lehoucq, R., Thornquist, H.K., Tuminaro, R.S., Willenbring, J.M., Bartlett, R., Howle, V.E., & Howle, V.E. (2003). An overview of Trilinos. 10.2172/918383