Publications Details

Energy and Performance Benchmarking of a Domain Wall-Magnetic Tunnel Junction Multibit Adder

Xiao, T.P.; Bennett, Christopher H.; Hu, Xuan; Feinberg, Ben; Jacobs-Gedrim, Robin; Agarwal, Sapan; Brunhaver, John S.; Friedman, Joseph S.; Incorvia, Jean A.C.; Marinella, Matthew J.

The domain-wall (DW)-magnetic tunnel junction (MTJ) device implements universal Boolean logic in a manner that is naturally compact and cascadable. However, an evaluation of the energy efficiency of this emerging technology for standard logic applications is still lacking. In this article, we use a previously developed compact model to construct and benchmark a 32-bit adder entirely from DW-MTJ devices that communicates with DW-MTJ registers. The results of this large-scale design and simulation indicate that while the energy cost of systems driven by spin-transfer torque (STT) DW motion is significantly higher than previously predicted, the same concept using spin-orbit torque (SOT) switching benefits from an improvement in the energy per operation by multiple orders of magnitude, attaining competitive energy values relative to a comparable CMOS subprocessor component. Finally, this result clarifies the path toward practical implementations of an all-magnetic processor system.