Publications

Abstract not provided.

The main objective of this project was to develop reliable, low-cost techniques for joining silicon nitride (Si{sub 3}N{sub 4}) to itself and to metals. For Si{sub 3}N{sub 4} to be widely used in advanced turbomachinery applications, joining techniques must be developed that are reliable, cost-effective, and manufacturable. This project addressed those needs by developing and testing two Si{sub 3}N{sub 4} joining systems; oxynitride glass joining materials and high temperature braze alloys. Extensive measurements were also made of the mechanical properties and oxidation resistance of the braze materials. Finite element models were used to predict the magnitudes and positions of the stresses in the ceramic regions of ceramic-to-metal joints sleeve and butt joints, similar to the geometries used for stator assemblies.

Electronic components and micro-sensors utilize ceramic substrates, copper and aluminum interconnect and silicon. The joining of these combinations require pre-metallization such that solders with fluxes can wet such combinations of metals and ceramics. The paper will present a new solder alloy that can bond metals, ceramics and composites. The alloy directly wets and bonds in air without the use flux or premetallized layers. The paper will present typical processing steps and joint microstructures in copper, aluminum, aluminum oxide, aluminum nitride, and silicon joints.

Minimizing the likelihood of solder joint embrittlement in connectors is realized by reducing or eliminating retained Au plating and/or Au-Sn intermetallic compound formation from the assemblies. Gold removal is performed most effectively by using a double wicking process. When only a single wicking procedure can be used, a higher soldering temperature improves the process of Au removal from the connector surfaces and to a nominal extent, removal of Au-contaminated solder from the joint. A longer soldering time did not appear to offer any appreciable improvement toward removing the Au-contaminated solder from the joint. Because the wicking procedure was a manual process, it was operator dependent.

An assessment was made of the manufacturability of hybrid microcircuit test vehicles assembled using three Pb-free solder compositions 96.5Sn--3.5Ag (wt.%), 91.84Sn--3.33Ag--4.83Bi, and 86.85Sn--3.15Ag--5.0Bi--5.0Au. The test vehicle substrate was 96% alumina; the thick film conductor composition was 76Au--21Pt--3Pd. Excellent registration between the LCCC or chip capacitor packages and the thick film solder pads was observed. Reduced wetting of bare (Au-coated) LCCC castellations was eliminated by hot solder dipping the I/Os prior to assembly of the circuit card. The Pb-free solders were slightly more susceptible to void formation, but not to a degree that would significantly impact joint functionality. Microstructural damage, while noted in the Sn-Pb solder joints, was not observed in the Pb-free interconnects.

Microstructural evolution due to aging of solder alloys determines their long-term reliability as electrical, mechanical and thermal interconnects in electronics packages. The ability to accurately determine the reliability of existing electronic components as well as to predict the performance of proposed designs depends upon the development of reliable material models. A kinetic Monte Carlo simulation was used to simulate microstructural evolution in solder-class materials. The grain growth model simulated many of the microstructural features observed experimentally in 63Sn-37Pb, a popular near-eutectic solder alloy. The model was validated by comparing simulation results to new experimental data on coarsening of Sn-Pb solder. The computational and experimental grain growth exponent for two-phase solder was found to be much lower than that for normal, single phase grain growth. The grain size distributions of solders obtained from simulations were narrower than that of normal grain growth. It was found that the phase composition of solder is important in determining grain growth behavior.

Corrosion is an important consideration in the design of a solder joint. In the case of a conduit, corrosion from both the outside service environment and the medium being transported within the pipe or tube must be addressed. Solder joints are susceptible to atmospheric corrosion, galvanic corrosion, voltage-assisted corrosion, stress corrosion cracking, and corrosion fatigue cracking. Galvanic corrosion is of particular concern, given the fact that solder joints are comprised of different metals or alloys in contact with one another.

Soldering provides a cost-effective means for attaching electronic packages to circuit boards using both small scale and large scale manufacturing processes. Soldering processes accommodate through-hole leaded components as well as surface mount packages, including the newer area array packages such as the Ball Grid Arrays (BGA), Chip Scale Packages (CSP), and Flip Chip Technology. The versatility of soldering is attributed to the variety of available solder alloy compositions, substrate material methodologies, and different manufacturing processes. For example, low melting temperature solders are used with temperature sensitive materials and components. On the other hand, higher melting temperature solders provide reliable interconnects for electronics used in high temperature service. Automated soldering techniques can support large-volume manufacturing processes, while providing high reliability electronic products at a reasonable cost.

An evaluation was performed which examined the aging of surface mount solder joints assembled with 91.84Sn-3.33Ag-4.83Bi solder. Defect analysis of the as-fabricated test vehicles revealed excellent solderability, good package alignment, and a minimum number of voids. Continuous DC electrical monitoring of the solder joints did not reveal opens during as many as 10,000 thermal cycles (0 C, 100 C). The solder joints exhibited no significant degradation through 2500 cycles, based upon an absence of microstructural damage and sustained shear and pull strengths of chip capacitors and J-leaded solder joints, respectively. Thermal cycles of 5000 and 10,000 resulted in some surface cracking of the solder fillets and coatings. In a few cases, deeper cracks were observed in the thinner reaches of several solder fillets. There was no deformation or cracking in the solder located in the gap between the package I/O and the circuit board pad nor in the interior of the fillets, both locations that would raise concerns of joint mechanical integrity. A drop in the chip capacitor shear strength was attributed to crack growth near the top of the fillet.

Aging analyses were performed on solder joints from two radar units: (1) a laboratory, N57 tube-type radar unit and (2) a field-returned, B61-0, tube-type radar unit. The cumulative temperature environments experienced by the units during aging were calculated from the intermetallic compound layer thickness and the mean Pb-rich phase particle size metrics for solder joints in the units, assuming an aging time of 35 years for both radars. Baseline aging metrics were obtained from a laboratory test vehicle assembled at AS/FM and T; the aging kinetics of both metrics were calculated from isothermal aging experiments. The N57 radar unit interconnect board solder joints exhibited very little aging. The eyelet solder joints did show cracking that most likely occurred at the time of assembly. The eyelet, SA1126 connector solder joints, showed some delamination between the Cu pad and underlying laminate. The B61 field-returned radar solder joints showed a nominal degree of aging. Cracking of the eyelet solder joints was observed. The Pb-rich phase particle measurements indicated additional aging of the interconnects as a result of residual stresses. Cracking of the terminal pole connector, pin-to-pin solder joint was observed; but it was not believed to jeopardize the electrical functionality of the interconnect. Extending the stockpile lifetime of the B61 tube-type radar by an additional 20 years would not be impacted by the reliability of the solder joints with respect to further growth of the intermetallic compound layer. Additional coarsening of the Pb-rich phase will increase the joints' sensitivity to thermomechanical fatigue.

There are two sources of contamination in solder alloys. The first source is trace elements from the primary metals used in the as-manufactured product, be that product in ingot, wire, or powder form. Their levels in the primary metal are determined by the refining process. While some of these trace elements are naturally occurring materials, additional contamination can result from the refining and/or forming processes. Sources include: furnace pot liners, debris on the cutting edges of shears, rolling mill rollers, etc. The types and levels of contaminants per solder alloy are set by recognized industrial, federal, military, and international specifications. For example, the 63Sn-37Pb solder purchased to the ASTM B 32 standard can have maximum levels of contamination for the following metals: 0.08(wt.)%Cu, 0.001 %Cd, 0.005%Al, 0.25%Bi, 0.03%As, 0.02%Fe, and 0.005 %Zn. A second cause of contamination in solders, and solder baths in particular, is their actual use in soldering operations. Each time a workpiece is introduced into the bath, some dissolution of the joint base metal(s), protective or solderable coatings, and fixture metal takes place which adds to contamination levels in the solder. The potential impurities include Cu; Ni; Au or other noble metals used as protective finishes and Al; Fe; and Zn to name a few. Even dissolution of the pot wall or liner is a source of impurities, typically Fe.

An expression for the coarsening rate of the Pb-rich phase particles was determined through isothermal aging experiments and comparative literature data as: λ = λo+{[4.10×10-5 e-11023/T+15.6×10-8 e-3123/T (dγ/dt)]t}0.256 where γo and γ are the initial and final mean Pb-rich particle diameters, respectively (mm); T is temperature (°K); t is time (s); and dγ/dt is the strain rate (s-1). The phase coarsening behavior showed good agreement with previous literature data from isothermal aging experiments. The power-law exponent, p, for the Pb-rich phase size coarsening kinetics: γp-γop≈t increased from a value of 3.3 at the low aging temperature regime (70-100 °C) to a value of 5.1 at the high temperature regime (135-170 °C), suggesting that the number of short-circuit diffusion paths had increased with further aging. This expression provides an important basis for the microstructurally-based, constitutive equation used in the visco-plastic model for TMF in Sn-Pb solder. The revised visco-plastic model was exercised using a through-hole solder joint configuration. Initial data indicate a satisfactory compatibility between the coarsening expression and the constitutive equations.

A overview has been presented on the topic of alternative surface finishes for package I/Os and circuit board features. Aspects of processability and solder joint reliability were described for the following coatings: baseline hot-dipped, plated, and plated-and-fused 100Sn and Sn-Pb coatings; Ni/Au; Pd, Ni/Pd, and Ni/Pd/Au finishes; and the recently marketed immersion Ag coatings. The Ni/Au coatings appear to provide the all-around best option in terms of solderability protection and wire bondability. Nickel/Pal ftishes offer a slightly reduced level of performance in these areas that is most likely due to variable Pd surface conditions. It is necessmy to minimize dissolved Au or Pd contents in the solder material to prevent solder joint embrittlement. Ancillary aspects that included thickness measurement techniques; the importance of finish compatibility with conformal coatings and conductive adhesives; and the need for alternative finishes for the processing of non-Pb bearing solders were discussed.

The 91.84Sn-3.33Ag-4.83Bi and 96.5Sn-3.5Ag Pb-free solders were evaluated for surface mount circuit board interconnects. The 63Sn-37Pb solder provided the baseline data. All three solders exhibited suitable manufacturability per a defect analyses of circuit board test vehicles. Thermal cycling had no significant effect on the 91.84Sn-3.33Ag-4.83Bi solder joints. Some degradation in the form of grain boundary sliding was observed in 96.5Sn-3.5Ag and 63Sn-37Pb solder joints. The quality of the solder joint microstructures showed a slight degree of degradation under thermal shock exposure for all of the solders tested. Trends in the solder joint shear strengths could be traced to the presence of Pd in the solder, the source of which was the Pd/Ni finish on the circuit board conductor features. The higher, intrinsic strengths of the Pb-free solders encouraged the failure path to be located in proximity to the solder/substrate interface where Pd combined with Sn to form brittle PdSn{sub 4} particles, resulting in reduced shear strengths.

A mathematical model was developed to quantitatively describe the intermetallic compound (IMC) layer growth that takes place between a Sn-based solder and a noble metal thick film conductor material used in hybrid microcircuit (HMC) assemblies. The model combined the reaction kinetics of the solder/substrate interaction, as determined from ancillary isothermal aging experiments, with a 2-D finite element mesh that took account of the porous morphology of the thick film coating. The effect of the porous morphology on the IMC layer growth when compared to the traditional 1-D computations was significant. The previous 1-D calculations under-predicted the nominal IMC layer thickness relative to the 2-D case. The 2-D model showed greater substrate consumption by IMC growth and lesser solder consumption that was determined with the 1-D computation. The new 2-D model allows the design engineer to better predict circuit aging and hence, the reliability of HMC hardware that is placed in the field.

The B61 accelerated aging unit (AAU) provided a unique opportunity to document the effects of a controlled, long-term thermal cycling environment on the aging of materials used in the device. This experiment was of particular interest to solder technologists because thermal cycling environments are a predominant source of solder joint failures in electronic assemblies. Observations of through hole solder joints in the MC2918 Firing Set from the B61 AAU did not reveal signs of catastrophic failure. Quantitative analyses of the microstructural metrics of intermetallic compound layer thickness and Pb-rich phase particle distributions indicated solder joint aging that was commensurate with the accelerated aging environment. The effects of stress-enhanced coarsening of the Pb-rich phase were also documented.

A test procedure was developed to assess the capillary flow wettability of solders inside a confined geometry. The test geometry comprised two parallel plates with a controlled gap of constant thickness (0.008 cm, 0.018 cm, 0.025 cm and 0.038 cm). Capillary flow was assessed by: (1) the meniscus or capillary rise of the solder within the gap; (2) the extent of void formation in the gap; and (3) the time dependence of the risen solder film. Tests were performed with the lead-free solders 95Sn-5Sb, 96.5Sn-3.5Ag, and 91.84Sn-3.33Ag-4.83Bi. The capillary rise of the lead-free solders was less than that observed with the 63Sn-37Pb control. Reducing the solder surface tension and contact angle improved capillary flow. Void formation by the non lead solders increased as the gap became smaller. The extent of voiding was determined primarily by the gap size rather than the wettability parameters (contact angle or surface tension) of the individual alloys. © 1997, MCB UP Limited

MC1814 Interconnection Boxes from dismantled B57 bombs, and MC2839 firing Sets from retired W70-1 warheads were obtained from the Pantex facility. Printed circuit boards were selected from these components for microstructural analysis of their solder joints. The analysis included a qualitative examination of the solder joints and quantitative assessments of (1) the thickness of the intermetallic compound layer that formed between the solder and circuit board Cu features, and (2) the Pb-rich phase particle distribution within the solder joint microstructure. The MC2839 solder joints had very good workmanship qualities. The intermetallic compound layer stoichiometry was determined to be that of Cu6Sn5. The mean intermetallic compound layer thickness for all solder joints was 0.885 mm. The magnitude of these values did not indicate significant growth over the weapon lifetime. The size distribution of the Pb-rich phase particles for each of the joints were represented by the mean of 9.85 {times} 10{sup {minus}6} mm{sup 2}. Assuming a spherical geometry, the mean particle diameter would be 3.54 mm. The joint-to-joint difference of intermetallic compound layer thickness and Pb-rich particle size distribution was not caused by varying thermal environments, but rather, was a result of natural variations in the joint microstructure that probably existed at the time of manufacture. The microstructural evaluation of the through-hole solder joints form the MC2839 and MC1814 components indicated that the environmental conditions to which these electronic units were exposed in the stockpile, were benign regarding solder joint aging. There was an absence of thermal fatigue damage in MC2839 circuit board, through-hole solder joints. The damage to the eyelet solder joints of the MC1814 more likely represented infant mortality failures at or very near the time of manufacture, resulting from a marginal design status of this type of solder joint design.

An experimental program was performed that examined the physical and mechanical properties of several candidate, lead (Pb)-free solder alloys. The project was separated into three tasks designated as follows: (1) Alloy Development, (2) Intermetallic Compound (IMC) Growth, and (3) Mechanical Testing. Task 1, Alloy Development, examined the impact that small Pb additions had on the physical and mechanical properties of several Pb-free solders. Task 2, Intermetallic Compound (IMC) Growth investigated the development of the IMC layer between several Pb-free solder alloys and Cu. Quantitative analyses established the kinetics of layer growth in the solid state as a result of elevated temperature aging treatments, and as a function of the composition of the solder. Liquid state IMC layer growth as well as dissolution rates of Cu substrates by molten solders were quantitatively documented. Task 3, Mechanical Properties, performed a series of experiments that provided fracture toughness measurement, thermomechanical fatigue evaluations, and creep deformation data on a number of the Pb-free solders as well as on Pb-free alloys that had been contaminated with controlled quantities of Pb additions. The data obtained from these tests results relative performance information as well as valuable input data for computer models. Several ancillary tests were also performed to support partner company efforts.

The suitability of various metallic printed wiring board surface finishes was assessed for new technology applications that incorporate assembly with Lead-free solders. The manufacture of a lead-free product necessitates elimination of lead (Pb) from the solder, the circuit board as well as the component lead termination. It is critical however for the selected interconnect Pb-free solder and the corresponding printed wiring board (PWB) and component lead finishes to be mutually compatible. Baseline compatibility of select Pb-free solders with Pb containing PWB surface finish and components was assessed. This was followed by examining the compatibility of the commercially available CASTIN{trademark} (SnAgCuSb) Pb-free solder with a series of PWB metallic finishes: Ni/Au, Ni/Pd, and Pd/Cu. The compatibility was assessed with respect to assembly performance, solder joint integrity and long term attachment reliability. Solder joint integrity and mechanical behavior of representative 50 mil pitch 20I/O SOICs was determined before and after thermal stress. Mechanical pull test studies demonstrated that the strength of SnAgCuSb solder interconnections is notably greater than that of SnPb interconnections.

Enhanced performance goals and environmental restrictions have heightened the consideration for use of alternative solders as replacements for the traditional tin-lead (Sn-Pb) eutectic and near-eutectic alloys. However, the implementation of non-Pb bearing surface finishes may lag behind solder alloy development. A study was performed which examined the effect(s) of Pb contamination on the performance of Sn-Ag-Bi and Sn-Ag-Cu-Sb lead-free solders by the controlled addition of 63Sn-37Pb solder at levels of 0.5 {minus} 8.0 wt.%. Thermal analysis and ring-in-plug shear strength studies were conducted on bulk solder properties. Circuit board prototype studies centered on the performance of 20I/O SOIC gull wing joints. Both alloys exhibited declines in their melting temperatures with greater Sn-Pb additions. The ring-in-plug shear strength of the Sn-Ag-Cu-Sb solder increased slightly with Sn-Pb levels while the Sn-Ag-Bi alloy experienced a strength loss. The mechanical behavior of the SOIC (Small Outline Integrated Circuit) Sn-Ag-Bi solder joints reproduced the strength levels were insensitive to 10,106 thermal cycles. The Sn-Ag-Cu-Sb solder showed a slight decrease in the gull wing joint strengths that was sensitive to the Pb content of the surface finish.

Recent trends towards finer pitch devices and assembly with lead free solders have resulted in increased interest in NiPd plated component leads by the electronics industry. This paper discusses the performance of NiPd fine pitch components as determined by wettability, assembly performance and solder joint reliability. Assembly evaluations were performed with a lead free solder as well as with eutectic SnPb solder. The compatibility of the NiPd component leads with different circuit board finishes (metallic and organic azole) will also be discussed.

Prototype circuit board test vehicles wee assembled with three candidate lead-free solders: 96.5Sn-3.5Ag (wt %), 58Bi-42Sn, and 91.84Sn-3.33 Ag 83Bi., using a forced-convection/infrared furnace and RMA flux based pastes. Wettability of circuit board features and packages was best with Sn-Ag-Bi alloy followed in order by Bi-Sn and Sn-Ag solders. The Sn-Ag-Bi solder had a greater propensity for void formation in the joints. The reliability assessment was based upon solder joint microstructure and the shear strength of selected leadless packages. Solder joint damage was of a greater extent after thermal shock exposures rather than thermal cycling. The Sn-Ag-Bi alloy on the largest package appeared most susceptible to thermal shock. Test vehicle performance clearly demonstrated that, with the non-lead solders, local thermal expansion mismatch can be as detrimental to joint integrity as the traditional global mismatch damage.

The manufacturing feasibility and attachment reliability of a series of newly developed lead-free solders were investigated for wave soldering applications. Some of the key assembly aspects addressed included: wettability as a function of board surface finish, flux activation and surface tension of the molten solder, solder joint fillet quality and optimization of soldering thermal profiles. Generally, all new solder formulations exhibited adequate wave soldering performance and can be considered as possible alternatives to eutectic SnPb for wave soldering applications. Further process optimization and flux development is necessary to achieve the defect levels associated with the conventional SnPb process.

The introduction of alternative, non-lead bearing solders into electronic assemblies requires a thorough investigation of product manufacturability and reliability. Both of these attributes can be impacted by the excessive growth of intermetallic compound (IMC) layers at the solder/substrate interface. An extensive study has documented the stoichiometry and solid state growth kinetics of IMC layers formed between copper and the lead-free solders: 96.5Sn-3.5Ag (wt.%), 95Sn-5Sb, 100Sn, and 58Bi-42Sn. Aging temperatures were 70--205 C for the Sn-based solders and 55--120 C for the Bi-rich solder. Time periods were 1--400 days for all of the alloys. The Sn/Cu, Sn-Ag/Cu, and Sn-Sb/Cu IMC layers exhibited sub-layers of Cu{sub 6}Sn{sub 5} and Cu{sub 3}Sn; the latter composition was present only following prolonged aging times or higher temperatures. The total layer growth exhibited a time exponent of n = 0.5 at low temperatures and a value of n = 0.42 at higher temperatures in each of the solder/Cu systems. Similar growth kinetics were observed with the low temperature 58Bi-42Sn solder; however, a considerably more complex sub-layer structure was observed. The kinetic data will be discussed with respect to predicting IMC layer growth based upon solder composition.