Thin, high-density layers of dopants in semiconductors, known as δ-layer systems, have recently attracted attention as a platform for exploration of the future quantum and classical computing when patterned in plane with atomic precision. However, there are many aspects of the conductive properties of these systems that are still unknown. Here we present an open-system quantum transport treatment to investigate the local density of electron states and the conductive properties of the δ-layer systems. A successful application of this treatment to phosphorous δ-layer in silicon both explains the origin of recently-observed shallow sub-bands and reproduces the sheet resistance values measured by different experimental groups. Further analysis reveals two main quantum-mechanical effects: 1) the existence of spatially distinct layers of free electrons with different average energies; 2) significant dependence of sheet resistance on the δ-layer thickness for a fixed sheet charge density.
We present an efficient self-consistent implementation of the Non-Equilibrium Green Function formalism, based on the Contact Block Reduction method for fast numerical efficiency, and the predictor-corrector approach, together with the Anderson mixing scheme, for the self-consistent solution of the Poisson and Schrödinger equations. Then, we apply this quantum transport framework to investigate 2D horizontal Si:P δ-layer Tunnel Junctions. We find that the potential barrier height varies with the tunnel gap width and the applied bias and that the sign of a single charge impurity in the tunnel gap plays an important role in the electrical current.
The atomic precision advanced manufacturing (APAM) enabled vertical tunneling field effect transistor (TFET) presents a new opportunity in microelectronics thanks to the use of ultra-high doping and atomically abrupt doping profiles. We present modeling and assessment of the APAM TFET using TCAD Charon simulation. First, we show, through a combination of simulation and experiment, that we can achieve good control of the gated channel on top of a phosphorus layer made using APAM, an essential part of the APAM TFET. Then, we present simulation results of a preliminary APAM TFET that predict transistor-like current-voltage response despite low device performance caused by using large geometry dimensions. Future device simulations will be needed to optimize geometry and doping to guide device design for achieving superior device performance.
While it is likely practically a bad idea to shrink a transistor to the size of an atom, there is no arguing that it would be fantastic to have atomic-scale control over every aspect of a transistor – a kind of crystal ball to understand and evaluate new ideas. This project showed that it was possible to take a niche technique used to place dopants in silicon with atomic precision and apply it broadly to study opportunities and limitations in microelectronics. In addition, it laid the foundation to attaining atomic-scale control in semiconductor manufacturing more broadly.
One big challenge of the emerging atomic precision advanced manufacturing (APAM) technology for microelectronics application is to realize APAM devices that operate at room temperature (RT). We demonstrate that semiclassical technology computer aided design (TCAD) device simulation tool can be employed to understand current leakage and improve APAM device design for RT operation. To establish the applicability of semiclassical simulation, we first show that a semiclassical impurity scattering model with the Fermi-Dirac statistics can explain the very low mobility in APAM devices quite well; we also show semiclassical TCAD reproduces measured sheet resistances when proper mobility values are used. We then apply semiclassical TCAD to simulate current leakage in realistic APAM wires. With insights from modeling, we were able to improve device design, fabricate Hall bars, and demonstrate RT operation for the very first time.
We present a Physics-Informed Graph Neural Network (pigNN) methodology for rapid and automated compact model development. It brings together the inherent strengths of data-driven machine learning, high-fidelity physics in TCAD simulations, and knowledge contained in existing compact models. In this work, we focus on developing a neural network (NN) based compact model for a non-ideal PN diode that represents one nonlinear edge in a pigNN graph. This model accurately captures the smooth transition between the exponential and quasi-linear response regions. By learning voltage dependent non-ideality factor using NN and employing an inverse response function in the NN loss function, the model also accurately captures the voltage dependent recombination effect. This NN compact model serves as basis model for a PN diode that can be a single device or represent an isolated diode in a complex device determined by topological data analysis (TDA) methods. The pigNN methodology is also applicable to derive reduced order models in other engineering areas.