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Comparing Algorithms for Graph Isomorphism Using Discrete- and Continuous-Time Quantum Random Walks

Journal of Computational and Theoretical Nanoscience

Rudinger, Kenneth M.; Gamble, John K.; Bach, Eric B.; Friesen, Mark F.; Joynt, Robert J.; Coppersmith, S.N.C.

Berry and Wang [Phys. Rev. A 83, 042317 (2011)] show numerically that a discrete-time quan- tum random walk of two noninteracting particles is able to distinguish some non-isomorphic strongly regular graphs from the same family. Here we analytically demonstrate how it is possible for these walks to distinguish such graphs, while continuous-time quantum walks of two noninteracting parti- cles cannot. We show analytically and numerically that even single-particle discrete-time quantum random walks can distinguish some strongly regular graphs, though not as many as two-particle noninteracting discrete-time walks. Additionally, we demonstrate how, given the same quantum random walk, subtle di erences in the graph certi cate construction algorithm can nontrivially im- pact the walk's distinguishing power. We also show that no continuous-time walk of a xed number of particles can distinguish all strongly regular graphs when used in conjunction with any of the graph certi cates we consider. We extend this constraint to discrete-time walks of xed numbers of noninteracting particles for one kind of graph certi cate; it remains an open question as to whether or not this constraint applies to the other graph certi cates we consider.

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Compressed optimization of device architectures

Gamble, John K.; Frees, Adam F.; Ward, Daniel R.; Blume-Kohout, Robin J.; Eriksson, M.A.; Friesen, Mark F.; Coppersmith, S.N.

Recent advances in nanotechnology have enabled researchers to control individual quantum mechanical objects with unprecedented accuracy, opening the door for both quantum and extreme- scale conventional computation applications. As these devices become more complex, designing for facility of control becomes a daunting and computationally infeasible task. Here, motivated by ideas from compressed sensing, we introduce a protocol for the Compressed Optimization of Device Architectures (CODA). It leads naturally to a metric for benchmarking and optimizing device designs, as well as an automatic device control protocol that reduces the operational complexity required to achieve a particular output. Because this protocol is both experimentally and computationally efficient, it is readily extensible to large systems. For this paper, we demonstrate both the bench- marking and device control protocol components of CODA through examples of realistic simulations of electrostatic quantum dot devices, which are currently being developed experimentally for quantum computation.

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Demonstration of qubit operations below a rigorous fault tolerance threshold with gate set tomography

Nature Communications

Blume-Kohout, Robin J.; Gamble, John K.; Nielsen, Erik N.; Rudinger, Kenneth M.; Mizrahi, Jonathan; Fortier, Kevin M.; Maunz, Peter

Quantum information processors promise fast algorithms for problems inaccessible to classical computers. But since qubits are noisy and error-prone, they will depend on fault-tolerant quantum error correction (FTQEC) to compute reliably. Quantum error correction can protect against general noise if - and only if - the error in each physical qubit operation is smaller than a certain threshold. The threshold for general errors is quantified by their diamond norm. Until now, qubits have been assessed primarily by randomized benchmarking, which reports a different error rate that is not sensitive to all errors, and cannot be compared directly to diamond norm thresholds. Here we use gate set tomography to completely characterize operations on a trapped-Yb+-ion qubit and demonstrate with greater than 95% confidence that they satisfy a rigorous threshold for FTQEC (diamond norm ≤6.7 × 10-4).

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Electron Turbulence at Nanoscale Junctions

Nano Letters

Bushong, Neil B.; Gamble, John K.; Di Ventra, Massimiliano D.

Electron transport through a nanostructure can be characterized in part using concepts from classical fluid dynamics. Hence, it is natural to ask how far the analogy can be taken and whether the electron liquid can exhibit nonlinear dynamical effects such as turbulence. Here we present an ab initio study of the electron dynamics in nanojunctions which reveals that the latter indeed exhibits behavior quite similar to that of a classical fluid. In particular, we find that a transition from laminar to turbulent flow occurs with increasing current, corresponding to increasing Reynolds numbers. These findings reveal unexpected features of electron dynamics and shed new light on our understanding of transport properties of nanoscale systems.

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Fabrication of quantum dots in undoped Si/Si0.8Ge0.2 heterostructures using a single metal-gate layer

Applied Physics Letters

Lu, Tzu-Ming L.; Gamble, John K.; Muller, Richard P.; Nielsen, Erik N.; Bethke, D.; Ten Eyck, Gregory A.; Pluym, Tammy P.; Wendt, J.R.; Dominguez, Jason J.; Lilly, M.P.; Carroll, Malcolm; Wanke, M.C.

Enhancement-mode Si/SiGe electron quantum dots have been pursued extensively by many groups for their potential in quantum computing. Most of the reported dot designs utilize multiple metal-gate layers and use Si/SiGe heterostructures with Ge concentration close to 30%. Here, we report the fabrication and low-temperature characterization of quantum dots in the Si/Si0.8Ge0.2 heterostructures using only one metal-gate layer. We find that the threshold voltage of a channel narrower than 1 μm increases as the width decreases. The higher threshold can be attributed to the combination of quantum confinement and disorder. We also find that the lower Ge ratio used here leads to a narrower operational gate bias range. The higher threshold combined with the limited gate bias range constrains the device design of lithographic quantum dots. We incorporate such considerations in our device design and demonstrate a quantum dot that can be tuned from a single dot to a double dot. The device uses only a single metal-gate layer, greatly simplifying device design and fabrication.

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Results 1–25 of 63
Results 1–25 of 63