Publications

Hembree, Charles E.; Hanson, Joshua M.; Paskaleva, Biliana S.; Bochev, Pavel B.; Keiter, Eric R.; Mar, Alan M.; Mei, Ting M.

Abstract not provided.

Kuberry, Paul A.; Mei, Ting M.; Keiter, Eric R.; Paskaleva, Biliana S.; Bochev, Pavel B.; Hanson, Joshua M.

Abstract not provided.

Keiter, Eric R.; Verley, Jason V.; Thornquist, Heidi K.; Kuberry, Paul A.; Galvan, Edgar

Abstract not provided.

Hanson, Joshua M.; Paskaleva, Biliana S.; Bochev, Pavel B.; Keiter, Eric R.; Hembree, Charles E.; Kuberry, Paul A.

Abstract not provided.

Kuberry, Paul A.; Keiter, Eric R.

This is the documentation for the Xyce-PyMi embedded Python model interpreter in Xyce.

Aadithya, Karthik V.; Kuberry, Paul A.; Paskaleva, Biliana S.; Bochev, Pavel B.; Leeson, Kenneth M.; Mar, Alan M.; Mei, Ting M.; Keiter, Eric R.

Abstract not provided.

Aadithya, Karthik V.; Kuberry, Paul A.; Keiter, Eric R.; Bochev, Pavel B.; Mar, Alan M.; Mei, Ting M.; Paskaleva, Biliana S.; Leeson, Kenneth M.

Abstract not provided.

Aadithya, Karthik V.; Kuberry, Paul A.; Paskaleva, Biliana S.; Bochev, Pavel B.; Leeson, Kenneth M.; Mar, Alan M.; Mei, Ting M.; Keiter, Eric R.

Compact semiconductor device models are essential for efficiently designing and analyzing large circuits. However, traditional compact model development requires a large amount of manual effort and can span many years. Moreover, inclusion of new physics (e.g., radiation effects) into an existing model is not trivial and may require redevelopment from scratch. Machine Learning (ML) techniques have the potential to automate and significantly speed up the development of compact models. In addition, ML provides a range of modeling options that can be used to develop hierarchies of compact models tailored to specific circuit design stages. In this paper, we explore three such options: (1) table-based interpolation, (2) Generalized Moving Least-Squares, and (3) feedforward Deep Neural Networks, to develop compact models for a p-n junction diode. We evaluate the performance of these "data-driven" compact models by (1) comparing their voltage-current characteristics against laboratory data, and (2) building a bridge rectifier circuit using these devices, predicting the circuit's behavior using SPICE-like circuit simulations, and then comparing these predictions against laboratory measurements of the same circuit.

Aadithya, Karthik V.; Kuberry, Paul A.; Keiter, Eric R.; Bochev, Pavel B.; Mar, Alan M.; Mei, Ting M.; Paskaleva, Biliana S.; Leeson, Kenneth M.

Abstract not provided.

Keiter, Eric R.; Swiler, Laura P.; Wilcox, Ian Z.

Abstract not provided.

Keiter, Eric R.; Swiler, Laura P.; Wilcox, Ian Z.

Abstract not provided.

Keiter, Eric R.; Swiler, Laura P.; Wilcox, Ian Z.

Abstract not provided.

Keiter, Eric R.; Swiler, Laura P.; Wilcox, Ian Z.

Abstract not provided.

Keiter, Eric R.; Swiler, Laura P.; Russo, Thomas V.; Wilcox, Ian Z.

Parametric sensitivities of dynamic system responses are very useful in a variety of applications, including circuit optimization and uncertainty quantification. Sensitivity calculation methods fall into two related categories: direct and adjoint methods. Effective implementation of such methods in a production circuit simulator poses a number of technical challenges, including instrumentation of device models. This report documents several years of work developing and implementing di- rect and adjoint sensitivity methods in the Xyce circuit simulator. Much of this work sponsored by the Laboratory Directed Research and Development (LDRD) Program at Sandia National Labora- tories, under project LDRD 14-0788.

Keiter, Eric R.; Swiler, Laura P.; Wilcox, Ian Z.

This report summarizes the methods and algorithms that were developed on the Sandia National Laboratory LDRD project entitled "Advanced Uncertainty Quantification Methods for Circuit Sim- ulation", which was project # 173331 and proposal # 2016-0845. As much of our work has been published in other reports and publications, this report gives an brief summary. Those who are in- terested in the technical details are encouraged to read the full published results and also contact the report authors for the status of follow-on projects.

Keiter, Eric R.; Swiler, Laura P.

Abstract not provided.

Keiter, Eric R.; Warrender, Christina E.; Mei, Ting M.; Russo, Thomas V.; Schiek, Richard S.; Thornquist, Heidi K.; Verley, Jason V.; Coffey, Todd S.; Pawlowski, Roger P.

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to develop new types of analysis without requiring the implementation of analysis-specific device models. Device models that are specifically tailored to meet Sandias needs, including some radiationaware devices (for Sandia users only). Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase a message passing parallel implementation which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.

Keiter, Eric R.; Mei, Ting M.; Russo, Thomas V.; Pawlowski, Roger P.; Schiek, Richard S.; Coffey, Todd S.; Thornquist, Heidi K.; Verley, Jason V.; Warrender, Christina E.

This document is a reference guide to the Xyce Parallel Electronic Simulator, and is a companion document to the Xyce Users Guide [1] . The focus of this document is (to the extent possible) exhaustively list device parameters, solver options, parser options, and other usage details of Xyce. This document is not intended to be a tutorial. Users who are new to circuit simulation are better served by the Xyce Users Guide [1] .

Russo, Thomas V.; Mei, Ting M.; Keiter, Eric R.; Schiek, Richard S.; Thornquist, Heidi K.; Verley, Jason V.; Coffey, Todd S.; Pawlowski, Roger P.; Warrender, Christina E.

This manual describes the use of the Xyce Parallel Electronic Simulator. Xyce has been designed as a SPICE-compatible, high-performance analog circuit simulator, and has been written to support the simulation needs of the Sandia National Laboratories electrical designers. This development has focused on improving capability over the current state-of-the-art in the following areas: Capability to solve extremely large circuit problems by supporting large-scale parallel computing platforms (up to thousands of processors). This includes support for most popular parallel and serial computers. A differential-algebraic-equation (DAE) formulation, which better isolates the device model package from solver algorithms. This allows one to develop new types of analysis without requiring the implementation of analysis-specific device models. Device models that are specifically tailored to meet Sandias needs, including some radiationaware devices (for Sandia users only). Object-oriented code design and implementation using modern coding practices. Xyce is a parallel code in the most general sense of the phrase a message passing parallel implementation which allows it to run efficiently a wide range of computing platforms. These include serial, shared-memory and distributed-memory parallel platforms. Attention has been paid to the specific nature of circuit-simulation problems to ensure that optimal parallel efficiency is achieved as the number of processors grows.

Keiter, Eric R.; Mei, Ting M.; Russo, Thomas V.; Pawlowski, Roger P.; Schiek, Richard S.; Coffey, Todd S.; Thornquist, Heidi K.; Verley, Jason V.; Warrender, Christina E.

This document is a reference guide to the Xyce Parallel Electronic Simulator, and is a companion document to the Xyce Users Guide [1] . The focus of this document is (to the extent possible) exhaustively list device parameters, solver options, parser options, and other usage details of Xyce. This document is not intended to be a tutorial. Users who are new to circuit simulation are better served by the Xyce Users Guide [1] .

Schiek, Richard S.; Mei, Ting M.; Rajamanickam, Sivasankaran R.; Keiter, Eric R.; Warrender, Christina E.; Aimone, James B.; Thornquist, Heidi K.; Russo, Thomas V.; Verley, Jason V.; Crossno, Patricia J.

Abstract not provided.

Keiter, Eric R.; Warrender, Christina E.; Verley, Jason V.; Mei, Ting M.; Russo, Thomas V.; Pawlowski, Roger P.; Schiek, Richard S.; Santarelli, Keith R.; Coffey, Todd S.; Thornquist, Heidi K.

Abstract not provided.

Keiter, Eric R.; Warrender, Christina E.; Verley, Jason V.; Mei, Ting M.; Russo, Thomas V.; Pawlowski, Roger P.; Schiek, Richard S.; Santarelli, Keith R.; Coffey, Todd S.; Thornquist, Heidi K.

Abstract not provided.

Schiek, Richard S.; Warrender, Christina E.; Thornquist, Heidi K.; Mei, Ting M.; Keiter, Eric R.; Russo, Thomas V.

Abstract not provided.

Boman, Erik G.; Heroux, Michael A.; Keiter, Eric R.; Rajamanickam, Sivasankaran R.; Schiek, Richard S.; Thornquist, Heidi K.

Abstract not provided.