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Vanadium flow battery electrolyte synthesis via chemical reduction of V2O5 in aqueous HCl and H2SO4

Proposed Journal Article, unpublished

Small, Leo J.; Soundappan, Thiagarajan; Laros, James H.; Anderson, Travis M.; Chalamala, Babu C.; Subramanian, Venkat

Here, we report a simple method to synthesize V4+(VO2+) electrolytes as feedstock for all vanadium redox flow batteries (RFB). By dissolving V2O5 in aqueous HCl and subsequently adding glycerol as a reducing agent, we have demonstrated an inexpensive route for electrolyte synthesis to concentrations >2.5 M V4+ (VO2+). Electrochemical analysis and testing of laboratory scale RFB demonstrate improved thermal stability across a wider temperature range (-10-65°C) for V4+(VO2+) electrolytes in HCl compared to in H2SO4 electrolytes.

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A Novel Experimental Method for Measuring Coefficients of Restitution

Baca, Renee N.; Reu, Phillip L.; Aragon, Dannelle S.; Brake, Matthew R.; Laros, James H.; Bejarano, Michael V.; Sumali, Hartono S.

A novel, experimental method is presented for measuring the coefficient of restitution during impact events. These measurements are used to indirectly validate a new model of elastic-plastic contact. The experimental setup consists of a stainless steel sphere that is attached at the bottom of a 2.2 m long pendulum. The test materials are of the form of 1 inch diameter pucks that the sphere strikes over a range of velocities. Digital image correlation is used to measure the displacement and velocity of the ball. From this data the coefficient of restitution is calculated as a function of velocity. This report details the experimental setup, experimental process, the results acquired, as well as the future work.

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Software Requirements for ATDM On-Node Resource Management

Olivier, Stephen L.; Laros, James H.; Brightwell, Ronald B.

This report outlines the software requirements for on-node resource management in the Advanced Simulation and Computing (ASC) Advanced Technology Development and Mitigation (ATDM) project at Sandia National Laboratories (SNL). The need for on-node resource management has arisen from the componentization of the software stack. Componentization aids in managing complexity and making software more composable and reusable. However, components must compete for limited on-node resources for execution (e.g., cores and hardware threads) and memory. The requirements documented in this report support an effort to manage this contention, avoiding oversubscription of resources and enabling their efficient deployment for application execution.

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Thermal Design and Characterization of Heterogeneously Integrated InGaP/GaAs HBTs

IEEE Transactions on Components, Packaging and Manufacturing Technology

Choi, Sukwon; Peake, Gregory M.; Keeler, Gordon A.; Geib, K.M.; Briggs, R.D.; Laros, James H.; Shaffer, Ryan A.; Clevenger, Jascinda C.; Patrizi, G.A.; Klem, John F.; Tauke-Pedretti, Anna; Nordquist, Christopher N.

Flip-chip heterogeneously integrated n-p-n InGaP/GaAs heterojunction bipolar transistors (HBTs) with integrated thermal management on wide-bandgap AlN substrates followed by GaAs substrate removal are demonstrated. Without thermal management, substrate removal after integration significantly aggravates self-heating effects, causing poor $I$-$V$ characteristics due to excessive device self-heating. An electrothermal codesign scheme is demonstrated that involves simulation (design), thermal characterization, fabrication, and evaluation. Thermoreflectance thermal imaging, electrical-temperature sensitive parameter-based thermometry, and infrared thermography were utilized to assess the junction temperature rise in HBTs under diverse configurations. In order to reduce the thermal resistance of integrated devices, passive cooling schemes assisted by structural modification, i.e., positioning indium bump heat sinks between the devices and the carrier, were employed. By implementing thermal heat sinks in close proximity to the active region of flip-chip integrated HBTs, the junction-to-baseplate thermal resistance was reduced over a factor of two, as revealed by junction temperature measurements and improvement of electrical performance. The suggested heterogeneous integration method accounts for not only electrical but also thermal requirements providing insight into realization of advanced and robust III-V/Si heterogeneously integrated electronics.

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High Performance Computing: Power Application Programming Interface Specification (V.1.3)

Laros, James H.; Kelly, Suzanne M.; Laros, James H.; Grant, Ryan E.; Olivier, Stephen L.; Levenhagen, Michael J.; DeBonis, David D.

Measuring and controlling the power and energy consumption of high performance computing systems by various components in the software stack is an active research area [13, 3, 5, 10, 4, 21, 19, 16, 7, 17, 20, 18, 11, 1, 6, 14, 12]. Implementations in lower level software layers are beginning to emerge in some production systems, which is very welcome. To be most effective, a portable interface to measurement and control features would significantly facilitate participation by all levels of the software stack. We present a proposal for a standard power Application Programming Interface (API) that endeavors to cover the entire software space, from generic hardware interfaces to the input from the computer facility manager.

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Operational Excellence through Schedule Optimization and Production Simulation of Application Specific Integrated Circuits

Flory, John A.; Laros, James H.; Gauthier, John H.; Nelson, April M.; Miller, Steven P.

Upcoming weapon programs require an aggressive increase in Application Specific Integrated Circuit (ASIC) production at Sandia National Laboratories (SNL). SNL has developed unique modeling and optimization tools that have been instrumental in improving ASIC production productivity and efficiency, identifying optimal operational and tactical execution plans under resource constraints, and providing confidence in successful mission execution. With ten products and unprecedented levels of demand, a single set of shared resources, highly variable processes, and the need for external supplier task synchronization, scheduling is an integral part of successful manufacturing. The scheduler uses an iterative multi-objective genetic algorithm and a multi-dimensional performance evaluator. Schedule feasibility is assessed using a discrete event simulation (DES) that incorporates operational uncertainty, variability, and resource availability. The tools provide rapid scenario assessments and responses to variances in the operational environment, and have been used to inform major equipment investments and workforce planning decisions in multiple SNL facilities.

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Effect of substrate orientation on CdS homoepitaxy by molecular dynamics

Journal of Crystal Growth

Zhou, Xiaowang Z.; Laros, James H.; Chavez, Jose J.; Zubia, D.

CdS homoepitaxy growth was performed by molecular dynamics using different substrate orientations and structures in order to analyze the CdS crystallinity. As anticipated from thermodynamics of homoepitaxy, highly crystalline films with only point defects were obtained on substrates with rectangular surface geometries, including [112¯] zinc blende (ZB), [101¯0] wurtzite (WZ), [112¯0] WZ, [110] ZB, [010] ZB, and [1101110] ZB. In contrast, films grown on substrates with hexagonal surface geometries, corresponding to the [0001] WZ and [111] ZB growth directions, showed structures with a large number of defects including; anti-sites, vacancies, stacking faults, twinning, and polytypism. WZ and ZB transitions and grain boundaries are identified using a lattice identification algorithm and represented graphically in a structural map. A dislocation analysis was performed to detect, identify, and quantify linear defects within the atomistic data. Systematic simulations using different temperatures, deposition rates, and substrate polarities were perform to analyze the trends of dislocation densities on [0001] WZ direction and showed persistent polytypism. The polytypism observed in the films grown on the substrates with hexagonal surface geometry is attributed to the similar formation energies of the WZ and ZB phases.

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Tensile cracking of a brittle conformal coating on a rough substrate

International Journal of Fracture

Laros, James H.

This note examines the effect of interfacial roughness on the initiation and growth of channel cracks in a brittle film. A conformal film with cusp-like surface flaws that replicate the substrate roughness is investigated. This type of surface flaw is relatively severe in the sense that stress diverges as the cusp-tip is approached (i.e., there is a power-law stress singularity). For the geometry and range of film properties considered, the analysis suggests that smoothing the substrate could substantially increase the film’s resistance to the formation of the through-the-thickness cracks that precede channel cracking. Furthermore, smoothing the substrate’s surface has a relatively modest effect on the film stress needed to propagate a channel crack.

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Results 1901–1925 of 2,290
Results 1901–1925 of 2,290