The same department that developed the hardware and software for the Code Management System (see main story) has developed Sandia’s first custom microprocessor architecture. The Sandia Secure Processor, or SSP, will have its first application in weapon use control, as a PAL-system component. But the architecture is generic, in the expectation that it will have multiple applications.
"It is important to note that this system is not designed for blazing speed as most commercial processors are," says Greg Wickstrom of Surety Electronics and Software Dept. 2125, which has project responsibility. "It is targeted for small, embedded, safety-critical systems. Any safety-critical system may find it useful." Satellites and medical devices are among the possibilities.
Although some of the newer use-control systems use modern processors, they are still constrained to older languages that make developing safe and secure software difficult. The Sandia Secure Processor is based on a subset of the newer Java language, which has inherent advantages for safety and security.
"Basically, we wanted to select a language that protects programmers from themselves," says Greg — one that helps identify and correct errors. The Java language fits the bill. "We’re leveraging its safety and security capabilities to the maximum extent," he says.
"Java usually requires a software virtual machine to execute, and we are turning that virtual machine into a physical one," says Department 2125 Manager Tom Perea. "This lets Java software run much more efficiently in very small systems."
The processor is not only secure but fully verifiable. "Since Sandia owns this design, we can analyze it to any level of detail," says Tom. In fact, a goal of this program is to enable the application of mathematically provable methods for verifying flawless, secure operation.
"We are now integrating all the parts of the processor into one coherent piece and testing the whole system in simulations," says Tom. The tools that synthesize the design into a producible part are currently generating a mere 40,000 logic elements capable of running at 50 MHz.
He notes that while major microelectronics chip companies might require large teams of developers to design a new processor, the SSP has been developed with the equivalent of three full-time employees over the last three years. This has been enabled through the use of modern development tools and close teaming between the three departments contributing to its development, 2125, 1735, and 2121.
Plans are to fabricate the SSP in a radiation-hardened technology at Sandia’s Microelectronics Development Laboratory. .