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Chronicles of astra: Challenges and lessons from the first petascale arm supercomputer

International Conference for High Performance Computing, Networking, Storage and Analysis, SC

Pedretti, Kevin P.; Younge, Andrew J.; Hammond, Simon D.; Laros, James H.; Curry, Matthew J.; Aguilar, Michael J.; Hoekstra, Robert J.; Brightwell, Ronald B.

Arm processors have been explored in HPC for several years, however there has not yet been a demonstration of viability for supporting large-scale production workloads. In this paper, we offer a retrospective on the process of bringing up Astra, the first Petascale supercomputer based on 64-bit Arm processors, and validating its ability to run production HPC applications. Through this process several immature technology gaps were addressed, including software stack enablement, Linux bugs at scale, thermal management issues, power management capabilities, and advanced container support. From this experience, several lessons learned are formulated that contributed to the successful deployment of Astra. These insights can be helpful to accelerate deploying and maturing other first-seen HPC technologies. With Astra now supporting many users running a diverse set of production applications at multi-thousand node scales, we believe this constitutes strong supporting evidence that Arm is a viable technology for even the largest-scale supercomputer deployments.

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Profiling platform storage using IO500 and mistral

Proceedings of PDSW 2019: IEEE/ACM 4th International Parallel Data Systems Workshop - Held in conjunction with SC 2019: The International Conference for High Performance Computing, Networking, Storage and Analysis

Monnier, Nolan; Lofstead, Jay; Lawson, Margaret R.; Curry, Matthew J.

This paper explores how we used IO500 and the Mistral tool from Ellexus to observe detailed performance characteristics to inform tuning IO performance on Astra, a ARM-based Sandia machine with an all flash, Lustre-based storage array. Through this case study, we demonstrate that IO500 serves as a meaningful storage benchmark, even for all flash storage. We also demonstrate that using fine-grained profiling tools, such as Mistral, is essential for revealing tuning requirement details. Overall, this paper demonstrates the value of a broad spectrum benchmark, like IO500, together with a fine grained performance analysis tool, such as Mistral, for understanding detailed storage system performance for better informed tuning.

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All-electrical universal control of a double quantum dot qubit in silicon MOS

Technical Digest - International Electron Devices Meeting, IEDM

Harvey-Collard, Patrick; Jock, Ryan M.; Jacobson, Noah T.; Baczewski, Andrew D.; Mounce, Andrew M.; Curry, Matthew J.; Ward, Daniel R.; Anderson, John M.; Manginell, Ronald P.; Wendt, J.R.; Rudolph, Martin R.; Pluym, Tammy P.; Lilly, Michael L.; Pioro-Ladrière, Michel; Carroll, Malcolm

Qubits based on transistor-like Si MOS nanodevices are promising for quantum computing. In this work, we demonstrate a double quantum dot spin qubit that is all-electrically controlled without the need for any external components, like micromagnets, that could complicate integration. Universal control of the qubit is achieved through spin-orbit-like and exchange interactions. Using single shot readout, we show both DC- and AC-control techniques. The fabrication technology used is completely compatible with CMOS.

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9 Results
9 Results