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Publication	Type	Year
Subthreshold operation of SONOS analog memory to enable accurate low-power neural network inference 2022 International Electron Devices Meeting (IEDM) Vineet Agrawal, Tianyao Xiao, Christopher Bennett, Benjamin Feinberg, Shivananda Shetty, Harsha Medu, Kiran Thekkekera, Ramesh Chettuvetty, Sam Leshner, Zharina Luzada, Long Hinh, Tuan Phan, Matthew Marinella, Sapan Agarwal	Abstract – 2022 Abstract	2022
CrossSim Inference Manual v2.0 Tianyao Xiao, Christopher Bennett, Benjamin Feinberg, Matthew Marinella, Sapan Agarwal https://www.osti.gov/search/identifier:1869509	Report – 2022 Report	2022
Achieving Accurate In-Memory Neural Network Inference with Highly Overlapping Nonvolatile Memory State Distributions IEEE Electron Devices Technology and Manufacturing Conference 2022 Matthew Marinella, Tianyao Xiao, Benjamin Feinberg, Christopher Bennett, Vineet Agrawal, Helmut Puchner, Sapan Agarwal	Conference Presentation – 2022 Conference Presentation	2022
Energy Efficient Deep Neural Network Processing: Digital CMOS Limits and Prospects for Analog In-Memory Computing Energy Consequences of Information conference Matthew Marinella, Tianyao Xiao, Christopher Bennett, Benjamin Feinberg, William Wahby, Robin B Jacobs-Gedrim, Vineet Agrawal, Helmut Puchner, Hugh Barnaby, Sapan Agarwal	Conference Presentation – 2022 Conference Presentation	2022
An accurate, error-tolerant and energy-efficient neural network inference engine based on SONOS analog memory IEEE Transactions on Circuits and Systems IRegular Papers Tianyao Xiao, Benjamin Feinberg, Christopher Bennett, Vineet Agrawal, Prashant Saxena, Venkatraman Prabhakar, Krishnaswamy Ramkumar, Harsha Medu, Vijay Raghavan, Ramesh Chettuvetty, Sapan Agarwal, Matthew Marinella https://www.osti.gov/search/identifier:1842837	Journal Article – 2022 Journal Article	2022
Radiation Hard Computing using Spintronics The 7th US Government working group on magnetic tunnel junctions (MTJs) Matthew Marinella, Tianyao Xiao, Christopher Bennett, Benjamin Feinberg, Jean Anne Incorvia, Reza Arghavani, David Russell Hughart	Presentation (non-conference) – 2021 Presentation (non-conference)	2021
Energy Efficient Deep Neural Network Processing 2022 Energy Consequences of Information Workshop Matthew Marinella, Tianyao Xiao, Christopher Bennett, Benjamin Feinberg, Sapan Agarwal	Abstract – 2021 Abstract	2021
Achieving Accurate In-Memory Neural Network Inference with Highly Overlapping Nonvolatile Memory State Distributions Electron Device Tech and Manufacturing Conf, 2022 Matthew Marinella, Tianyao Xiao, Benjamin Feinberg, Christopher Bennett, Vineet Agrawal, Helmut Puchner, Sapan Agarwal	Abstract – 2021 Abstract	2021
CrossSim: GPU-Accelerated Simulation of Analog Neural Networks ModSim 2021 Tianyao Xiao, Christopher Bennett, Benjamin Feinberg, Matthew Marinella, Sapan Agarwal	Conference Presentation – 2021 Conference Presentation	2021
Analysis and Mitigation of Parasitic Resistance Effects for Analog In-Memory Neural Network Acceleration Semiconductor Science and Technology Tianyao Xiao, Benjamin Feinberg, Jacob Nathanael Rohan, Christopher Bennett, Sapan Agarwal, Matthew Marinella https://www.osti.gov/search/identifier:1828786	Journal Article – 2021 Journal Article	2021
Designing Accurate and Robust Analog Accelerators for Neural Networks and Linear Algebra Sandia & Georgia Tech WorkshopHeterogeneous Integration & Co-Design Tianyao Xiao, Benjamin Feinberg, Christopher Bennett, Sapan Agarwal, Matthew Marinella	Presentation (non-conference) – 2021 Presentation (non-conference)	2021
CrossSim: GPU-Accelerated Simulation of Analog Neural Networks ModSim2021 Tianyao Xiao, Christopher Bennett, Benjamin Feinberg, Matthew Marinella, Sapan Agarwal	Abstract – 2021 Abstract	2021
Evaluating complexity and resilience trade-offs in emerging memory inference machines NICE Virtual Conference Proceedings Christopher Bennett, Ryan Anthony Dellana, Tianyao Xiao, Benjamin Feinberg, Sapan Agarwal, Suma George Cardwell, Matthew Marinella, William Mark Severa, James Bradley Aimone https://www.osti.gov/search/identifier:1859699	Conference Presentation – 2021 Conference Presentation	2021
Mosaic, The Best of Both Worlds: Analog devices with Digital Spiking Communication to build a Hybrid Neural Network Accelerator James Bradley Aimone, Christopher Bennett, Suma George Cardwell, Ryan Anthony Dellana, Tianyao Xiao https://www.osti.gov/search/identifier:1673175	SAND Report – 2020 SAND Report	2020
Energy-efficient stateful logic with magnetic domain walls No specific conference Tianyao Xiao, Christopher Bennett, Xuan Hu, Benjamin Feinberg, Robin B Jacobs-Gedrim, Sapan Agarwal, John Brunhaver, Joseph Friedman, Jean Anne Incorvia, Matthew Marinella https://www.osti.gov/search/identifier:1819252	Presentation (non-conference) – 2020 Presentation (non-conference)	2020
40nm embedded SONOS 8-bit analog memory capable of ultralow power inference with near-digital ImageNet accuracy International Electron Devices Meeting (IEDM) Tianyao Xiao, Christopher Bennett, Benjamin Feinberg, Venkatraman Prabhakar, Krishnaswamy Ramkumar, Harsha Medu, Vinay Mannikoth, Prashant Saxena, Michael Amundson, Vijay Raghavan, Ramesh Chettuvetty, Sapan Agarwal, Matthew Marinella	Abstract – 2020 Abstract	2020
Analog Architectures for Neural Network Acceleration Based on Non-Volatile Memory: A Review Applied Physics Reviews Tianyao Xiao, Christopher Bennett, Benjamin Feinberg, Sapan Agarwal, Matthew Marinella https://www.osti.gov/search/identifier:1668360	Journal Article – 2020 Journal Article	2020
Evaluating complexity and resilience trade-offs in emerging memory inference machines 2020 Neuro-Inspired Computational Elements Workshop Christopher Bennett, Ryan Anthony Dellana, Tianyao Xiao, Benjamin Feinberg, Sapan Agarwal, Suma George Cardwell, Matthew Marinella, William Mark Severa, James Bradley Aimone https://www.osti.gov/search/identifier:1768142	Conference Paper – 2020 Conference Paper	2020
Energy-efficient stateful logic with magnetic domain walls SPIE Optics + Photonics Tianyao Xiao, Christopher Bennett, Xuan Hu, Benjamin Feinberg, Robin B Jacobs-Gedrim, Sapan Agarwal, John Brunhaver, Joseph Friedman, Jean Anne Incorvia, Matthew Marinella	Abstract – 2020 Abstract	2020
Device-aware inference operations in SONOS non-volatile memory arrays International Reliability Physics Symposium Christopher Bennett, Tianyao Xiao, Ryan Anthony Dellana, Benjamin Feinberg, Sapan Agarwal, Matthew Marinella, Vineet Agrawal, Venkatraman Prabhakar, Krishnaswamy Ramkumar, Long Hinh, Swatilekha Saha, Vijay Raghavan, Ramesh Chettuvetty Chettuvetty https://www.osti.gov/search/identifier:1765314	Conference Paper – 2020 Conference Paper	2020
Energy and Performance Benchmarking of Domain Wall-Magnetic Tunnel Junction Logic Circuits IEEE International Magnetics Conference Tianyao Xiao, Christopher Bennett, Xuan Hu, Benjamin Feinberg, Robin B Jacobs-Gedrim, Sapan Agarwal, John Brunhaver, Joseph Friedman, Jean Anne Incorvia, Matthew Marinella	Abstract – 2020 Abstract	2020
Energy and Performance Benchmarking of a Domain Wall-Magnetic Tunnel Junction Multibit Adder IEEE Journal of Exploratory Solid-State Computational Devices and Circuits Tianyao Xiao, Christopher Bennett, Xuan Hu, Benjamin Feinberg, Robin B Jacobs-Gedrim, Sapan Agarwal, John Brunhaver, Joseph Friedman, Jean Anne Incorvia, Matthew Marinella https://www.osti.gov/search/identifier:1595031	Journal Article – 2019 Journal Article	2019
Evaluating complexity and resilience trade-offs in emerging memory inference machines Neuro-Inspired Computational Elements Workshop Suma George Cardwell, Christopher Bennett, James Bradley Aimone, Ryan Anthony Dellana, Sapan Aggarwal https://www.osti.gov/search/identifier:1643292	Conference Paper – 2019 Conference Paper	2019
Device-aware inference operations in SONOS non-volatile memory arrays 2020 IEEE International Reliability Physics Symposium Christopher Bennett, Tianyao Xiao, Ryan Anthony Dellana, Benjamin Feinberg, V. Prabhakar, K. Ramkumar, V. Agrawal, L. Hinh, S. Saha, Vijay Raghavan, Ramesh Chettuvetty, Sapan Agarwal, Matthew Marinella	Abstract – 2019 Abstract	2019
Mosaics, a technique to make neuromorphic computing scalable, adaptive and flexible International Conference on Artificial Intelligence Circuits and Systems Suma George Cardwell, James Bradley Aimone, Christopher Bennett, Ryan Anthony Dellana, Suma George Cardwell, William Mark Severa https://www.osti.gov/search/identifier:1642761	Conference Paper – 2019 Conference Paper	2019
Document Title	Type	Year

Publications

Subthreshold operation of SONOS analog memory to enable accurate low-power neural network inference

CrossSim Inference Manual v2.0

Achieving Accurate In-Memory Neural Network Inference with Highly Overlapping Nonvolatile Memory State Distributions

Energy Efficient Deep Neural Network Processing: Digital CMOS Limits and Prospects for Analog In-Memory Computing

An accurate, error-tolerant and energy-efficient neural network inference engine based on SONOS analog memory

Radiation Hard Computing using Spintronics

Energy Efficient Deep Neural Network Processing

Achieving Accurate In-Memory Neural Network Inference with Highly Overlapping Nonvolatile Memory State Distributions

CrossSim: GPU-Accelerated Simulation of Analog Neural Networks

Analysis and Mitigation of Parasitic Resistance Effects for Analog In-Memory Neural Network Acceleration

Designing Accurate and Robust Analog Accelerators for Neural Networks and Linear Algebra

CrossSim: GPU-Accelerated Simulation of Analog Neural Networks

Evaluating complexity and resilience trade-offs in emerging memory inference machines

Mosaic, The Best of Both Worlds: Analog devices with Digital Spiking Communication to build a Hybrid Neural Network Accelerator

Energy-efficient stateful logic with magnetic domain walls

40nm embedded SONOS 8-bit analog memory capable of ultralow power inference with near-digital ImageNet accuracy

Analog Architectures for Neural Network Acceleration Based on Non-Volatile Memory: A Review

Evaluating complexity and resilience trade-offs in emerging memory inference machines

Energy-efficient stateful logic with magnetic domain walls

Device-aware inference operations in SONOS non-volatile memory arrays

Energy and Performance Benchmarking of Domain Wall-Magnetic Tunnel Junction Logic Circuits

Energy and Performance Benchmarking of a Domain Wall-Magnetic Tunnel Junction Multibit Adder

Evaluating complexity and resilience trade-offs in emerging memory inference machines

Device-aware inference operations in SONOS non-volatile memory arrays

Mosaics, a technique to make neuromorphic computing scalable, adaptive and flexible