Richard C. Murphy

I am a computer architect at Sandia National Laboratories. I received my Ph.D. in computer engineering at the University of Notre Dame, under the direction of Peter Kogge. My research interests include computer architecture, with a focus on memory systems and Processing-In-Memory, VLSI, and massively parallel architectures, programming languages, and runtime systems. I spent 2000 to 2002 at Sun Microsystems focusing on hardware resource management and dynamic configuration.

Education

• Ph.D. Computer Science and Engineering, Traveling Threads a New Multithreaded Execution Model, Computer Science and Engineering Department, University of Notre Dame, May 2006. Advisor: Peter M. Kogge
• M.S. Computer Science and Engineering, Design Parameters for Distributed PIM Memory Systems, Computer Science and Engineering Department, University of Notre Dame, April 2000, Advisor: Peter M. Kogge
• B.S. Computer Science, University of Notre Dame, May 1998
• B.A. Government and International Studies, University of Notre Dame, May 1998, Senior Honors Thesis British Constitutional Reform: Sovereignty, Economics, and Party Politics, Advisor: Andrew C. Gould

Industry Experience

• Sandia National Laboratories, Senior Member of Technical Staff (March 2006-Present)
• Sandia National Laboratories, Intern (May-August 2003, May-October 2004)
• Sun Microsystems, Member of Technical Staff (2000-2002)
• QUALCOMM Inc., Engineering Intern (1995-1998)

Research Interests

• Processing-In-Memory (PIM)
• Multithreaded Computer Architecture
• Prediction and Modeling
• Programming Languages and Compilers
• Associative Memory Neural Networks

Honors and Awards

• Kaneb Center Outstanding Graduate Student Instructor (CSE321, Fall 2002)
• Outstanding Teaching Assistant (CSE322, Spring 1999)
• John J. Reilly Scholar (1998)

Patents and Disclosures

• Murphy, Richard C., Scott Carter, Shrikant Deshpande, and Mario Ornelas. System and Method for Dynamic Resource Reconfiguration Using a Dependency Graph. US Patent 7,152,157, granted December 19, 2006.
• Murphy, Richard C. Automated Resource Management Using Perceptron Prediction. US Patent 7,191,329, granted March 13, 2007.

Refereed Papers

• Wheeler, Kyle, Richard C. Murphy, and Douglas Thain, Qthreads: An API for Programming with Millions of Lightweight Threads in the Proceedings of the Workshop on Multithreaded Architectures and Applications, Miami, FL, 2008.
• Murphy, Richard C. On the Effects of Memory Latency and Bandwidth on Supercomputer Application Performance in the IEEE International Symposium on Workload Characterization 2007 (IISWC07), Boston, MA, September 27-29, 2007.
• Murphy, Richard C. and Peter M. Kogge, On the Memory Access Patterns of Supercomputer Applications: Benchmark Selection and Its Implications, IEEE Transactions on Computers 56(7): 937-945, July 2007.
• Murphy, Richard C., Jonathan Berry, William McLendon, Bruce Hendrickson, Douglas Gregor and Andrew Lumsdaine, DFS: A Simple to Write Yet Difficult to Execute Benchmark in the Proceedings of the IEEE International Symposium on Workload Characterizations 2006 (IISWC06), San Jose, CA, October 25-27, 2006.
• Sridharan, Srinivas, Brett Keck, Richard Murphy, Surendar Chandra, and Peter Kogge, Thread Migration to Improve Synchronization Performance in the Proceedings of the 2006 Workshop on Operating Systems Interference in High Performance Applications (OSIHPA 2006), in conjunction with PACT 2006, Seattle, WA, September 17, 2006.
• Murphy, Richard C., Arun Rodrigues, Peter Kogge, and Keith Underwood, The Implications of Working Set Analysis on Supercomputing Memory Hierarchy Design in the proceedings of the 2005 International Conference on Supercomputing, Cambridge, MA, June 20-22, 2005.
• Underwood, Keith D., K. Scott Hemmert, Arun Rodrigues, Richard Murphy, and Ron Brightwell, A Hardware Acceleration Unit for MPI Queue Processing, in the 19th International Parallel and Distributed Processing Symposium, Denver, Co, April 4-8, 2005.
• Rodrigues, Arun, Richard Murphy, Ron Brightwell, and Keith D. Underwood, Enhancing NIC Performance for MPI using Processing-in-Memory, in the proceedings of the 2005 Workshop on Communication Architectures for Clusters, in conjunction with IPDPS, Denver, Co, April 4-8, 2005.
• Rodrigues, Arun, Richard Murphy, Peter Kogge, and Keith Underwood, Characterizing a New Class of Threads in Scientific Applications for High End Supercomputers, in the Proceedings of the 18th Annual ACM International Conference on Supercomputing, June 26-July 1 2004, Saint Malo, France.
• Antonelli, Dominic A., Timothy J. Dysart, Danny Z. Chen, Xiaobo S. Hu, Andrew B. Kahng, Peter M. Kogge, Richard C. Murphy, and Michael T. Niemier, Quantum-Dot Cellular Automata (QCA) Circuit Partitioning: Problem Modeling and Solutions in the Proceedings of the 41st Design Automation Conference, June 7-11, 2004, San Diego, CA.
• Rodrigues, Arun, Richard C. Murphy, Peter M. Kogge, Jay Brockman, Ron Brightwell, and Keith Underwood Implications of a PIM Architectural Model for MPI in the Proceedings of the 2003 IEEE International Conference on Cluster Computing, Tsim Sha Tsui, Kowloon, Hong Kong, December 1-4, 2003.
• Murphy, Richard C. Phrase Detection and the Associative Memory Neural Network in the Proceedings of the 2003 International Joint Conference on Neural Networks, Portland Oregon, July 20-24, 2003.
• Murphy, Richard C. and Peter M. Kogge, Trading Bandwidth for Latency: Managing Continuations Through a Carpet Bag Cache in the Proceedings of the International Workshop on Innovative Architecture 2002 (IWIA02), Jan. 10-11, 2002.
• Kuntz, Shannon K., Richard C. Murphy, Michael T. Niemier, Jesus Izaguirre, and Peter M. Kogge, Petaflop Computing for Protein Folding in the Proceedings of the Tenth SIAM Conference on Parallel Processing for Scientific Computing, Portsmouth, Virginia, March 12-14, 2001.
• Murphy, Richard C., Peter M. Kogge, and Arun Rodrigues, The Characterization of Data Intensive Memory Workloads on Distributed PIM Systems, in the proceedings of the Second Workshop on Intelligent Memory Systems, held in conjunction with ASPLOS-IX, Cambridge, MA November 12-15, 2000. (Lecture Notes in Computer Science 2107, Springer-Verlag, November 2001.)

Invited Talks, Presentations, and Unrefereed Articles

• Traveling Threads: A New Multithreaded Execution Model, Oak Ridge National Lab, December 6, 2005.
• Traveling Threads: A New Multithreaded Execution Model, Sandia National Lab, April 11, 2005.
• Processing-In-Memory: Technology, Execution Model, Architecture, and Traveling Threads, 2003 Conference on High-Speed Computing (LANL/LLNL/SNL), Salishan Lodge, Glenden Beach, OR., April 21-24 2003
• with Shannon K. Kuntz, Michael T. Niemier, Jesus Izaguirre, and Peter M. Kogge, How can the Protein Folding Problem be Mapped onto a Million Processor Array to Achieve Petaflop Performance? Workshop on Computational Biology, SIAM Annual Meeting, Puerto Rico, July 10-14, 2000.

Teaching

• University of Notre Dame, Computer Architecture I, Fall 2002 and 2003.