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High Performance Electrical Modeling
and Simulation (HPEMS)
 

ASCI

With the elimination of underground nuclear testing and declining defense budgets, science-based stockpile stewardship requires increased reliance on high performance modeling and simulation of weapon systems. Present electrical circuit modeling and simulation capabilities are being significantly expanded by using massively parallel computational resources.

Two high performance electrical circuit simulations are now available. ChileSPICETM was an interim solution that converted the University of California Berkeley SPICE 3f5 to shared memory parallel platforms. It was first released in July 1999. It is still used on applications with large component counts and to perform sensitivity studies on system reliability.

The XyceTM Parallel Electronic Simulator  was developed in support of electrical designers at Sandia National Laboratories and, as such, implemented several novel features that makes their job considerably easier. In addition to allowing the simulation of circuits of unprecedented size, novel approaches to critical numerical kernels such as improved time-stepping algorithms and controls, better convergence of the nonlinear solver and improved device models are included. This approach aims to minimize the amount of simulation tuning required on the part of the designer to facilitate the codes successful usage.

The code is a parallel code in the most general sense of the phrase a message passing parallel implementation which allows it to run efficiently on the widest possible number of computing platforms. These include serial, shared-memory and distributed-memory parallel as well as heterogeneous platforms. Furthermore, careful attention was paid to the specific nature of circuit simulation problems to ensure that optimal parallel efficiency is achieved even as the number of processors grows. It was first released in October 2002.

To facilitate user access to and usage of ChileSPICETM and XyceTM, two JavaTM-based graphical user interfaces (GUI's) have been developed, i.e., the HPEMS Electronic Integrated Desktop Interface (HEIDITM) for remote job submittal and the ChileCADTM circuit model builder. HEIDITM is a thin client design console available on a users desktop, which allows web-based multi-platform job submission and parameter study analysis management. ChileCADTM does graphical schematic capture of circuits and generates netlists using user defined model validation rules. ChileCADTMs device pallets, model builder canvas and device property sheets provide a web-based capability similar to other PC-based schematic capture tools.

An advanced results processing capability, xdamp, is available to analyze simulation outputs. xdamp is a GUI designed to allow the user to manipulate two-dimensional waveforms and images that are typical of electrical engineering applications.

Please address comments or questions to mproduct@sandia.gov.