ChileSPICE^TM is based on the University of California Berkeley's version of SPICE 3f5. The code runs in a manner essentially identical to 3f5; however, ChileSPICE^TM can perform electrical simulations on complex electrical circuitry with component counts in excess of 88,000 using a shared memory parallel simulation scheme. Other advanced features not currently found in some commercial circuit simulators include restarting in the middle of a circuit simulation and an analytical photocurrent radiation model for BJT transistors. Major enhancements include:

• Parallel circuit load and solve
• Restart capability
• Extensive numerical diagnostics
• Startup performance increased from N**2 to NlogN
• Model Enhancements include:
  • BSIM3 transistor model
  • Wunsch-Axness photocurrent model (for BJT)
  • Age aware capacitor model for Z5U and X7R Dielectric Type ceramic capacitors
  • Tor Fjeldy radiation photocurrent models for diodes and BJT transistors
  • BJT2: Tor Fjeldy model for BJT including transient photocurrent radiation effects
  • 3F5 switch model replaced with PSpice-like switch model
  • DIO3: Tor Fjeldy model for Diode including transient photocurrent radiation effects
  • A nonlinear magnetic core model that is a modification of a version of the Jiles-Atherton model
  • Operating point voltage source
  • Specification of length and width parameters in MOSFET models
  • Special variable 'time' in expression evaluation package (allows simulation time to be used in behavioral modeling expressions)
  • All PSpice functions for behavioral modeling
  • A noop flag to .tran line, if no operating point calculation is desired
• Netlist Enhancements include:
  • PSpice-like parameters added to the netlist
  • PSpice-like parameter expressions
  • PSpice-like user defined functions
  • PSpice-like "if" statements (can be used in expressions)
  • Essentially the complete PSpice table capability (can be used in non-linear sources)
  • Digital logic devices implemented as sub-circuits with delays implemented through enhanced behavioral modeling language
• Input/Output Enhancements include:
  • Ability to write a Probe^TM-compatible (.csd) output file Improved error checking causing unrecognized model parameters to generate a diagnostic message and a fatal error, requiring the user to fix the problem and resubmit the job
  • Selectable output frequency for raw data files
  • Improved error checking causing unrecognized model parameters to generate a diagnostic message and a fatal error, requiring the user to fix the problem and resubmit the job
  • A new output (raw) file format that uses column formatted numeric data only (can be useful for importing into external post-processing tools such as Grace^GPL)
• User Interface Enhancements include:
  • New digital console interface (see ChileSPICE^TM/HEIDI^TM)
  • Improved error handling and reporting in the expression package such that users can more readily identify expressions containing math errors in behavioral expressions
  • Quick start and detailed ChileSPICE^TM users guides
• Model Stablity Enhancements include:
  • Removal of non-convergence problems in many circuits containing MOSFETS
  • User settable default values for the junction capacitances and lead resistances for semiconductor devices
  • Averaging capability in the Newton Method iterator that leads to many fewer "abort: timestep too small" terminations of the code
  • Modification of the numerical integration package to temporarily increase the number of newton iterations when the code is having difficulty converging
  • Newton iteration convergence test that uses a dynamic value for the absolute voltage or current error that is allowed at a particular node (makes possible the mixing of high and low voltage/currents in the same circuits)
• Matrix Processing Enhancements include:
  • A more robust algorithm for the Newton iteration limit when the code finds it necessary to reduce time steps (results in fewer convergence problems)
  • Removal of fill-in elements before a matrix reordering is attempted (particularly important for large runs where multiple re-orderings are required)
  • A fast indexing mechanism allowing an arbitrary matrix element to be located quickly (fast indexing improves scaling on large problems)
  • Triggering of reordering when a small pivot element is encountered (previously this was only triggered when an exact zero was encountered)
  • A packed column sparse format for matrix factor routines, solve routines and the load routines that significantly speeds up the factorization/solve in many cases

These capabilities may be accessed through a combination of compile time options for parallel load and solve, and new commands for restart and diagnostics. ChileSPICE^TM runs on multiple platforms, i.e., SGI serial & parallel, Sun/Solaris serial & parallel, DEC serial & parallel, and Cplant (and Linux ) serial only (both NM and CA systems). ChileSPICE^TM must pass a comparison test for correctness for all test circuits on all supported platforms. This test requires 2% agreement in key values for each circuit.

ChileSPICE^TM has extensive user support. There is a PSpice to ChileSPICE^TM netlist translator. Issue tracking is based on Bugzilla using a submittal and resolution process. Users can view the CVS^GPL repository for source code modifications and history. A code cross-reference viewer is available. A user can examine the source code via the web. The ChileSPICE^TM users guide includes documentation for all additional features and models. All documentation is full-text searchable. A link to the enterprise Component Information System (eCIS) is included to facilitate access to existing model netlists.

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