Digital/Mixed Signal Technologies
The ASIC design capability has been proven-in through the successful design and fabrication of a non-radiation hard ASIC equivalent to the Intel 80C51 microcontroller. This device was designed using the Compass cell library and tools and serves as our Standard Evaluation Circuit. In addition to ASIC standard cell library design capability, SNL is developing an RH FPGA. The Atmel AT6010 FPGA is to be converted to an RH implementation. FPGA's will offer a quick and inexpensive method to develop (sub)system designs.

Application encompassing an ASIC

Integrated Circuits
There are three IC technologies supported by the MDL, CMOS6R, CMOS6RA and CMOS7. The CMOS6R is our bulk CMOS technology and the CMOS6RA incorporates capacitors and resistors for Analog functions. The newest technology is our CMOS7 which is a SOI based CMOS .35µm technology.

Design/Test Process

Sandia Design capabilities exist for the following areas:

• Digital IC Design and Modeling
• Standard Cell,Gate Array, FPGAs
• CMOS, SONOS, BiCMOS (ASICs, A-D converters, SRAM, Non Volatile Memories)
• VHDL and Verilog for IC and Subsystem Modeling

Fabrication Sources

• MDL - CMOS_6R, CMOS_6RA, CMOS_7RS (production quantities
• Honeywell (RH gate array)
• MOSIS - CMOS and Mixed Signal (prototyping/proof of concept to date)
• Northrup Grummen - Non Volatile Memories

Flight Quality Process Flow

The Flight Quality Process Flow diagram is a 50 kb pdf file.

Products Delivered

Microsystems Science Technology & Components and the Microelectronic Development Laboratory has delivered proof of design, flight test quality, and War Reserve Units beginning in 1998. The complexity of these designs range from 10K to 120K gates and designs containing up to 2.8 million transistors. The functions of these ASICs are digital, mixed signal and analog using MDL's .6 µm CMOS6, .6 µm CMOS6R and .35 µm CMOS7- SOI technologies.