Electronic Packaging
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The Electronic Packaging technologies in the Thin Film, Vacuum, & Packaging Department are a resource for all aspects of microelectronic packaging. From design and layout to fabrication of prototype samples, the staff offers partners the opportunity for concurrent engineering and development of a variety of electronic packaging concepts. This includes assistance in selecting the most appropriate technology for manufacturing, analysis of performance characteristics and development of new and unique processes.
Capabilities:
- Network Fabrication
- Low Temperature Co-Fired Ceramic (LTCC)
- Thick Film
- Thin Film
- Packaging and Assembly
- Chip Level Packaging
- MEMs Packaging
- Hermetic Sealing
- Surface Mount Technology
- Integrated Passive Components
- Resistors
- Capacitors
- Inductors
- Laser Processing
- Machining Ceramic
- Resistor Trimming
- Serialization
Network Fabrication
Network fabrication is accomplished by patterning metals and dielectrics onto a free-standing substrate to form the base of a microcircuit. A variety of substrates, processes, and metals are used to do this. Several options are available for producing networks depending on requirements for circuit size, heat produced, operating frequency, cost and other factors.
- Low Temperature Cofire Ceramic (LTCC)
- LTCC networks are produced using screen printed conductors and resistors on multiple layers of green ceramic tape. Up to 50 layers of ceramic can be printed and then cofired for high density networks. An advantage of LTCC is the abilty to manufacture 3-dimensional electronic packages.
- Thick Film Networks (TKN )
- A TKN network is comprised of a ceramic substrate which has been screen printed and fired with conductor, resistor, and dielectric elements. This type circuit allows double-sided multilayer patterning for higher circuit density.
- Thin Film Networks (TFN)
- A TFN is produced with vacuum deposited resistor and conductor layers which are then photoprocessed into circuit elements. Several TFN substrate materials are selectable including alumina, aluminum nitride, diamond, silicon, etc. A major advantage is the precision patterning consistent with higher frequency circuits.
Packaging and Assembly
This department has the capabilities to fabricate a variety of integrated chip (IC) carrier assemblies, hybrid microcircuits, multi-chip modules and other unique electronic assemblies. The focus in packaging and assembly is two-fold: 1) development of advanced concepts in packaging and assembly and 2) providing technology and production oversight to Sandia organizations.
- Chip Level Packaging
- A broad term identifying processes used to attach IC's to a variety of IC packages or circuit boards and to provide interconnections between the IC's and the package or circuit board. These processes are commonly called die attach and wire bonding, respectively.
- Hermetic Sealing
- A method of sealing IC package so that the package is gastight. This method uses a solder or weld process to create the hermetic seal. Plastic encapsulation is another method of sealing; however, this approach is non-hermetic.
- Surface Mount Technology
- A method of assembling hybrid circuits and printed wiring boards, where component parts are soldered onto a variety of interconnect circuit boards rather than into the circuit board (as in pin-through-hole soldering).
Integrated Passive Components
This technology focuses on the use of silicon chip passive components and screen printing to fabricate small RCL type networks required to achieve miniaturization of electronic systems. Compared to discrete surface mount type components this packaging approach will allow up to 4X reduction in network size. This department's engineering resources and manufacturing capabilities promote design and rapid prototyping of these passive component assemblies in a concurrent engineering environment.
- Resistors
- Depending on the level of integration required resistors can be realized using thick film materials or through the use of discrete silicon chip resistors. A wide range of resistor values can be attained with either approach.
- Capacitors
- Commercially available high dielectric constant thick film materials for manufacturing integrated capacitors are limited thereby restricting the range of capacitor values possible. Discrete chip capacitors, as small as 20 mils square, are available in a wide range of values and can be combined with direct write or chip resistors to form integrated RC networks.
- Inductors
- Integrated inductors are primarily realized using screen printing or direct write techniques and can be combined with resistors and/or capacitors to form RLC networks. This technology also allows realization of integrated multilayer transformers.
Laser Processing
Using CO2 and ND-YAG lasers this department has developed capabilities for machining complex geometries, hole drilling and scribing both fired and "green" alumina and other materials. The use of a PC controlled ND-YAG laser system, incorporating a "flying probe" system, enhances our laser processing capabilities to include passive and active trimming of thick and thin film resistors to 1% as trimmed tolerance. In addition the ND-YAG laser system has been extensively used for alpha-numeric serialization of a wide variety of components types ranging from Neutron Tube ceramic piece parts to high carbon steel tool tips.
Resources:
- Complete processes and facilities for design and prototyping of LTCC, precision microwave and high-density thick and thin film networks.
- Broad range of die attach, wire bonding, hermetic sealing and process testing equipment conducted in class 1000 and 10,000 clean rooms and laboratories.
- CO2 and YAG laser for marking, resistor trimming and machining various materials.
Accomplishments:
- Developed capability to fabricate hermetically sealed, LTCC multi-chip modules.
- Realization of first packaged MEMs device using LTCC technology.
- Application of LTCC technology for high density satellite program.
Contacts:
Ken Peterson
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